| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-10-21 | qemu: change TLBs number to 64 in 34Kf mips cpu model |   Victor Kamensky | |
| Replace OE private qemu patch with one that got upstreamed and solves the same problem: increase qemumips CI performance by increasing number of TLBs in CPU model and reduce need to run software TLB refill code. Signed-off-by: Victor Kamensky <kamensky@cisco.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> (cherry picked from commit a99dace7463d310688f4098a51316dc0743651e2) Signed-off-by: Steve Sakoman <steve@sakoman.com> | |||
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index : openembedded-core-contrib | |
| OpenEmbedded Core user contribution trees | Grokmirror user |
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path: root/meta/recipes-devtools/qemu/qemu/0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch