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From 629891f67601275c9c4de0bb01afcf1a8c44fa3f Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Fri, 16 Mar 2018 19:55:21 -0700
Subject: [PATCH] npy_cpu: Add riscv support
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/10761]
---
numpy/core/include/numpy/npy_cpu.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h
index 5edd8f4..e1e4796 100644
--- a/numpy/core/include/numpy/npy_cpu.h
+++ b/numpy/core/include/numpy/npy_cpu.h
@@ -96,6 +96,8 @@
#define NPY_CPU_OR1K
#elif defined(__mc68000__)
#define NPY_CPU_M68K
+#elif defined(__riscv)
+ #define NPY_CPU_RISCV
#elif defined(__arc__) && defined(__LITTLE_ENDIAN__)
#define NPY_CPU_ARCEL
#elif defined(__arc__) && defined(__BIG_ENDIAN__)
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