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path: root/meta/recipes-kernel/linux/files/0001-for-ft1500a.patch
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From 3d4a9517b96ad17c84df5bc0c85002ff1b68ff56 Mon Sep 17 00:00:00 2001
From: Robert Yang <liezhi.yang@windriver.com>
Date: Thu, 9 Feb 2017 22:17:51 -0800
Subject: [PATCH] for ft1500a

Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
---
 arch/arm64/boot/dts/Makefile            |   1 +
 arch/arm64/boot/dts/phytium/Makefile    |   5 +
 arch/arm64/boot/dts/phytium/ft1500a.dts | 297 ++++++++++++++++++++++++++++++++
 drivers/tty/serial/8250/8250_port.c     |   3 +
 4 files changed, 306 insertions(+)
 create mode 100644 arch/arm64/boot/dts/phytium/Makefile
 create mode 100644 arch/arm64/boot/dts/phytium/ft1500a.dts

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 6e199c9..9a14b62 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -19,6 +19,7 @@ dts-dirs += socionext
 dts-dirs += sprd
 dts-dirs += xilinx
 dts-dirs += lg
+dts-dirs += phytium
 
 subdir-y	:= $(dts-dirs)
 
diff --git a/arch/arm64/boot/dts/phytium/Makefile b/arch/arm64/boot/dts/phytium/Makefile
new file mode 100644
index 0000000..d436e58
--- /dev/null
+++ b/arch/arm64/boot/dts/phytium/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_FT1500A) += ft1500a.dtb
+
+always		:= $(dtb-y)
+subdir-y	:= $(dts-dirs)
+clean-files	:= *.dtb
diff --git a/arch/arm64/boot/dts/phytium/ft1500a.dts b/arch/arm64/boot/dts/phytium/ft1500a.dts
new file mode 100644
index 0000000..9a4ecd7
--- /dev/null
+++ b/arch/arm64/boot/dts/phytium/ft1500a.dts
@@ -0,0 +1,297 @@
+/dts-v1/;
+
+/memreserve/	0x0000000080000000 0x0000000000010000;
+/ {
+	model = "FT1500a";
+	compatible = "arm,rtsm_ve,aemv8a", "arm,vexpress";
+	interrupt-parent = <0x1>;
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@4 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x100>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@5 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x101>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@6 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x102>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@7 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x103>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@8 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x200>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@9 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x201>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@10 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x202>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@11 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x203>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@12 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x300>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@13 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x301>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@14 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x302>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+
+		cpu@15 {
+			device_type = "cpu";
+			compatible = "arm,armv8";
+			reg = <0x0 0x303>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x8007fff0>;
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x0 0x80000000 0x8 0x80000000 0x0 0x80000000>;
+	};
+
+    gic: interrupt-controller@29800000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <0x3>;
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+		interrupt-controller;
+		reg = <0x0 0x29800000 0x0 0x10000 0x0 0x29a00000 0x0 0x200000 0x0 0x29c00000 0x0 0x10000 0x0 0x29c10000 0x0 0x10000 0x0 0x29c20000 0x0 0x10000>;
+		interrupts = <0x1 0x9 0x4>;
+		linux,phandle = <0x1>;
+		phandle = <0x1>;
+
+        its: gic-its@29820000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x0 0x29820000 0x0 0x20000>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
+		clock-frequency = <0x2faf080>;
+	};
+
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <0x0 0x3c 0x4 0x0 0x3d 0x4 0x0 0x3e 0x4 0x0 0x3f 0x4>;
+	};
+
+	smb {
+		compatible = "simple-bus";
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+		#interrupt-cells = <0x1>;
+		interrupt-map-mask = <0x0 0x0 0x3f>;
+		interrupt-map = <0x0 0x0 0x0 0x1 0x0 0x0 0x0 0x0 0x4 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x1 0x4 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x2 0x4 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x3 0x4 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x4 0x4 0x0 0x0 0x5 0x1 0x0 0x0 0x0 0x5 0x4 0x0 0x0 0x6 0x1 0x0 0x0 0x0 0x6 0x4 0x0 0x0 0x7 0x1 0x0 0x0 0x0 0x7 0x4 0x0 0x0 0x8 0x1 0x0 0x0 0x0 0x8 0x4 0x0 0x0 0x9 0x1 0x0 0x0 0x0 0x9 0x4 0x0 0x0 0xa 0x1 0x0 0x0 0x0 0xa 0x4 0x0 0x0 0xb 0x1 0x0 0x0 0x0 0xb 0x4 0x0 0x0 0xc 0x1 0x0 0x0 0x0 0xc 0x4 0x0 0x0 0xd 0x1 0x0 0x0 0x0 0xd 0x4 0x0 0x0 0xe 0x1 0x0 0x0 0x0 0xe 0x4 0x0 0x0 0xf 0x1 0x0 0x0 0x0 0xf 0x4 0x0 0x0 0x10 0x1 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x11 0x1 0x0 0x0 0x0 0x11 0x4 0x0 0x0 0x12 0x1 0x0 0x0 0x0 0x12 0x4 0x0 0x0 0x13 0x1 0x0 0x0 0x0 0x13 0x4 0x0 0x0 0x14 0x1 0x0 0x0 0x0 0x14 0x4 0x0 0x0 0x15 0x1 0x0 0x0 0x0 0x15 0x4 0x0 0x0 0x16 0x1 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x17 0x1 0x0 0x0 0x0 0x17 0x4 0x0 0x0 0x18 0x1 0x0 0x0 0x0 0x18 0x4 0x0 0x0 0x19 0x1 0x0 0x0 0x0 0x19 0x4 0x0 0x0 0x1a 0x1 0x0 0x0 0x0 0x1a 0x4 0x0 0x0 0x1b 0x1 0x0 0x0 0x0 0x1b 0x4 0x0 0x0 0x1c 0x1 0x0 0x0 0x0 0x1c 0x4 0x0 0x0 0x1d 0x1 0x0 0x0 0x0 0x1d 0x4 0x0 0x0 0x1e 0x1 0x0 0x0 0x0 0x1e 0x4 0x0 0x0 0x1f 0x1 0x0 0x0 0x0 0x1f 0x4 0x0 0x0 0x20 0x1 0x0 0x0 0x0 0x20 0x4 0x0 0x0 0x21 0x1 0x0 0x0 0x0 0x21 0x4 0x0 0x0 0x22 0x1 0x0 0x0 0x0 0x22 0x4 0x0 0x0 0x23 0x1 0x0 0x0 0x0 0x23 0x4 0x0 0x0 0x24 0x1 0x0 0x0 0x0 0x24 0x4 0x0 0x0 0x25 0x1 0x0 0x0 0x0 0x25 0x4 0x0 0x0 0x26 0x1 0x0 0x0 0x0 0x26 0x4 0x0 0x0 0x27 0x1 0x0 0x0 0x0 0x27 0x4 0x0 0x0 0x28 0x1 0x0 0x0 0x0 0x28 0x4 0x0 0x0 0x29 0x1 0x0 0x0 0x0 0x29 0x4 0x0 0x0 0x2a 0x1 0x0 0x0 0x0 0x2a 0x4 0x0 0x0 0x2b 0x1 0x0 0x0 0x0 0x2b 0x4 0x0 0x0 0x2c 0x1 0x0 0x0 0x0 0x2c 0x4 0x0 0x0 0x2d 0x1 0x0 0x0 0x0 0x2d 0x4>;
+
+		motherboard {
+			arm,v2m-memory-map = "rs1";
+			compatible = "arm,vexpress,v2m-p1", "simple-bus";
+			#address-cells = <0x2>;
+			#size-cells = <0x2>;
+			#interrupt-cells = <0x1>;
+			ranges;
+
+			clk24mhz {
+				compatible = "fixed-clock";
+				#clock-cells = <0x0>;
+				clock-frequency = <0x1c2000>;
+				clock-output-names = "v2m:clk24mhz";
+				linux,phandle = <0x4>;
+				phandle = <0x4>;
+			};
+
+			amba {
+				compatible = "arm,amba-bus", "simple-bus";
+				#address-cells = <0x2>;
+				#size-cells = <0x2>;
+				ranges;
+
+				gpio@28006000 {
+					compatible = "arm,platform-gpio";
+					reg = <0x0 0x28006000 0x0 0x80>;
+				};
+
+				uart@28001000 {
+					compatible = "snps,dw-apb-uart";
+					reg = <0x0 0x28001000 0x0 0x1000>;
+					baud = <0x1c200>;
+					reg-shift = <0x2>;
+					reg-io-width = <0x4>;
+					interrupts = <0x23>;
+					clocks = <0x4 0x4>;
+					clock-names = "uartclk", "apb_pclk";
+				};
+
+				uart@28000000 {
+					compatible = "snps,dw-apb-uart";
+					reg = <0x0 0x28000000 0x0 0x1000>;
+					baud = <0x1c200>;
+					reg-shift = <0x2>;
+					reg-io-width = <0x4>;
+					interrupts = <0x22>;
+					clocks = <0x4 0x4>;
+					clock-names = "uartclk", "apb_pclk";
+				};
+
+				i2c@28002000 {
+					compatible = "snps,designware-i2c";
+					#address-cells = <0x1>;
+					#size-cells = <0x0>;
+					interrupts = <0x24>;
+					clocks = <0x4 0x4>;
+					reg = <0x0 0x28002000 0x0 0x1000>;
+
+					rtc@68 {
+						compatible = "dallas,ds1339";
+						reg = <0x68>;
+					};
+				};
+
+				i2c@28003000 {
+					compatible = "snps,designware-i2c";
+					#address-cells = <0x2>;
+					#size-cells = <0x2>;
+					interrupts = <0x25>;
+					clocks = <0x4 0x4>;
+					reg = <0x0 0x28003000 0x0 0x1000>;
+				};
+
+				gmac@28c00000 {
+					compatible = "arm,amba-gmac0", "arm,primecell";
+					arm,primecell-periphid = <0x9>;
+					reg = <0x0 0x28c00000 0x0 0x2000>;
+					interrupts = <0x2c>;
+				};
+
+				gmac@28c02000 {
+					compatible = "arm,amba-gmac1", "arm,primecell";
+					arm,primecell-periphid = <0xb>;
+					reg = <0x0 0x28c02000 0x0 0x2000>;
+					interrupts = <0x2d>;
+				};
+
+                pcie0: pcie-controller {
+                    compatible = "pci-host-ecam-generic";
+                    device_type = "pci";
+                    #address-cells = <3>;
+                    #size-cells = <2>;
+                    #interrupt-cells = <1>;
+                    reg = <0 0x40000000 0 0x10000000>;
+                    dma-coherent;
+                    msi-parent = <&its>;
+                    interrupt-map-mask = <0x0000 0x0 0x0 0x7>;
+                    interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x33 0x4>,
+                            <0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 0x34 0x4>,
+                            <0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 0x35 0x4>,
+                            <0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 0x36 0x4>;
+                    ranges = <0x01000000 0x00 0x00000000 0x00 0x50000000 0x00 0x1000000>,
+                         <0x02000000 0x00 0x60000000 0x00 0x60000000 0x00 0x20000000>,
+                         <0x03000000 0x01 0x00000000 0x01 0x00000000 0x01 0x00000000>;
+                };
+            };
+        };
+    };
+};
+
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 858a546..a48ee48 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -2482,10 +2482,13 @@ static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
 	 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
 	 * otherwise just set DLAB
 	 */
+/* DO NOT set LCR for ft1500a */
+#if 0
 	if (up->capabilities & UART_NATSEMI)
 		serial_port_out(port, UART_LCR, 0xe0);
 	else
 		serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
+#endif
 
 	serial_dl_write(up, quot);
 
-- 
2.10.2