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author | Philippe Normand <philn@igalia.com> | 2019-05-26 13:06:32 +0200 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2019-05-28 10:29:20 +0100 |
commit | 4f9b8ce9aad05fd6e2b7d2fefc0d22fcb431c003 (patch) | |
tree | 76b55b344bd7bc7766c8270190f761d8c9a5524d /meta/recipes-multimedia/gstreamer/files/0002-gstconfig.h.in-initial-RISC-V-support.patch | |
parent | 0622b7e17b5c3db80a21c11e3079392552f144ea (diff) | |
download | openembedded-core-4f9b8ce9aad05fd6e2b7d2fefc0d22fcb431c003.tar.gz |
gstreamer1.0: upgrade to version 1.16.0
* 0002-gstconfig.h.in-initial-RISC-V-support.patch
Removed since this is included in 1.16.0
Signed-off-by: Philippe Normand <philn@igalia.com>
Signed-off-by: Carlos Rafael Giani <crg7475@mailbox.org>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-multimedia/gstreamer/files/0002-gstconfig.h.in-initial-RISC-V-support.patch')
-rw-r--r-- | meta/recipes-multimedia/gstreamer/files/0002-gstconfig.h.in-initial-RISC-V-support.patch | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/meta/recipes-multimedia/gstreamer/files/0002-gstconfig.h.in-initial-RISC-V-support.patch b/meta/recipes-multimedia/gstreamer/files/0002-gstconfig.h.in-initial-RISC-V-support.patch deleted file mode 100644 index db742dea23..0000000000 --- a/meta/recipes-multimedia/gstreamer/files/0002-gstconfig.h.in-initial-RISC-V-support.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 8a156d1725ecd03f2e8cdc8874e081dda2d3b43d Mon Sep 17 00:00:00 2001 -From: Aurelien Jarno <aurelien@aurel32.net> -Date: Sun, 15 Apr 2018 00:49:55 +0200 -Subject: [PATCH] gstconfig.h.in: initial RISC-V support - -RISC-V supports unaligned accesses, but these might run extremely slowly -depending on the implementation. Therefore set GST_HAVE_UNALIGNED_ACCESS -to 0 on this architecture. - -https://bugzilla.gnome.org/show_bug.cgi?id=795271 - -Signed-off-by: Alistair Francis <alistair.francis@wdc.com> -Upstream-Status: Accepted [1.15.1 - https://bugzilla.gnome.org/show_bug.cgi?id=795271] ---- - gst/gstconfig.h.in | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gst/gstconfig.h.in b/gst/gstconfig.h.in -index 6351c04da..33dfed1f6 100644 ---- a/gst/gstconfig.h.in -+++ b/gst/gstconfig.h.in -@@ -104,7 +104,7 @@ - * http://docs.oracle.com/cd/E19205-01/820-4155/c++_faq.html#Vers6 - * https://software.intel.com/en-us/node/583402 - */ --#if defined(__alpha__) || defined(__arc__) || defined(__arm__) || defined(__aarch64__) || defined(__bfin) || defined(__hppa__) || defined(__nios2__) || defined(__MICROBLAZE__) || defined(__mips__) || defined(__or1k__) || defined(__sh__) || defined(__SH4__) || defined(__sparc__) || defined(__sparc) || defined(__ia64__) || defined(_M_ALPHA) || defined(_M_ARM) || defined(_M_IA64) || defined(__xtensa__) || defined(__e2k__) -+#if defined(__alpha__) || defined(__arc__) || defined(__arm__) || defined(__aarch64__) || defined(__bfin) || defined(__hppa__) || defined(__nios2__) || defined(__MICROBLAZE__) || defined(__mips__) || defined(__or1k__) || defined(__sh__) || defined(__SH4__) || defined(__sparc__) || defined(__sparc) || defined(__ia64__) || defined(_M_ALPHA) || defined(_M_ARM) || defined(_M_IA64) || defined(__xtensa__) || defined(__e2k__) || defined(__riscv) - # define GST_HAVE_UNALIGNED_ACCESS 0 - #elif defined(__i386__) || defined(__i386) || defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__ppc__) || defined(__ppc64__) || defined(__powerpc__) || defined(__powerpc64__) || defined(__m68k__) || defined(_M_IX86) || defined(_M_AMD64) || defined(_M_X64) || defined(__s390__) || defined(__s390x__) || defined(__zarch__) - # define GST_HAVE_UNALIGNED_ACCESS 1 |