1 files changed, 0 insertions, 77 deletions
diff --git a/meta/recipes-devtools/qemu/qemu/10-xen-pt-add-a-few-PCI-config-space-field-descriptions-CVE-2015-4106.patch b/meta/recipes-devtools/qemu/qemu/10-xen-pt-add-a-few-PCI-config-space-field-descriptions-CVE-2015-4106.patch
deleted file mode 100644
index f30b40a93e..0000000000
--- a/meta/recipes-devtools/qemu/qemu/10-xen-pt-add-a-few-PCI-config-space-field-descriptions-CVE-2015-4106.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-Upstream-Status: Backport
-
-Signed-off-by: Kai Kang <kai.kang@windriver.com>
-
-From a88a3f887181605f4487a22bdfb7d87ffafde5d9 Mon Sep 17 00:00:00 2001
-From: Jan Beulich <jbeulich@suse.com>
-Date: Tue, 2 Jun 2015 15:07:01 +0000
-Subject: xen/pt: add a few PCI config space field descriptions
-Bug-Debian: http://bugs.debian.org/787547
-
-Since the next patch will turn all not explicitly described fields
-read-only by default, those fields that have guest writable bits need
-to be given explicit descriptors.
-
-This is a preparatory patch for XSA-131.
-
-Signed-off-by: Jan Beulich <jbeulich@suse.com>
----
- hw/xen/xen_pt_config_init.c | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
-diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
-index efd8bac..19f926b 100644
---- a/hw/xen/xen_pt_config_init.c
-+++ b/hw/xen/xen_pt_config_init.c
-@@ -754,6 +754,15 @@ static XenPTRegInfo xen_pt_emu_reg_vpd[] = {
-         .u.b.write  = xen_pt_byte_reg_write,
-     },
-     {
-+        .offset     = PCI_VPD_ADDR,
-+        .size       = 2,
-+        .ro_mask    = 0x0003,
-+        .emu_mask   = 0x0003,
-+        .init       = xen_pt_common_reg_init,
-+        .u.w.read   = xen_pt_word_reg_read,
-+        .u.w.write  = xen_pt_word_reg_write,
-+    },
-+    {
-         .size = 0,
-     },
- };
-@@ -889,6 +898,16 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = {
-         .u.w.read   = xen_pt_word_reg_read,
-         .u.w.write  = xen_pt_word_reg_write,
-     },
-+    /* Device Status reg */
-+    {
-+        .offset     = PCI_EXP_DEVSTA,
-+        .size       = 2,
-+        .res_mask   = 0xFFC0,
-+        .ro_mask    = 0x0030,
-+        .init       = xen_pt_common_reg_init,
-+        .u.w.read   = xen_pt_word_reg_read,
-+        .u.w.write  = xen_pt_word_reg_write,
-+    },
-     /* Link Control reg */
-     {
-         .offset     = PCI_EXP_LNKCTL,
-@@ -900,6 +919,15 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = {
-         .u.w.read   = xen_pt_word_reg_read,
-         .u.w.write  = xen_pt_word_reg_write,
-     },
-+    /* Link Status reg */
-+    {
-+        .offset     = PCI_EXP_LNKSTA,
-+        .size       = 2,
-+        .ro_mask    = 0x3FFF,
-+        .init       = xen_pt_common_reg_init,
-+        .u.w.read   = xen_pt_word_reg_read,
-+        .u.w.write  = xen_pt_word_reg_write,
-+    },
-     /* Device Control 2 reg */
-     {
-         .offset     = 0x28,
--- 
-2.1.4
-