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-rw-r--r--meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch104
1 files changed, 104 insertions, 0 deletions
diff --git a/meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch b/meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch
new file mode 100644
index 0000000000..782dce70d8
--- /dev/null
+++ b/meta/recipes-support/libffi/libffi/0001-arm-sysv-reverted-clang-VFP-mitigation.patch
@@ -0,0 +1,104 @@
+From 501a6b55853af549fae72723e74271f2a4ec7cf6 Mon Sep 17 00:00:00 2001
+From: Brett Warren <brett.warren@arm.com>
+Date: Fri, 27 Nov 2020 15:28:42 +0000
+Subject: [PATCH] arm/sysv: reverted clang VFP mitigation
+
+Since commit e3d2812ce43940aacae5bab2d0e965278cb1e7ea,
+seperate instructions were used when compiling under clang,
+as clang didn't allow the directives at the time. This mitigation
+now causes compilation to fail under clang 10, as described by
+https://github.com/libffi/libffi/issues/607. Now that
+clang supports the LDC and SDC instructions, this mitigation
+has been reverted.
+
+Upstream-Status: Pending
+Signed-off-by: Brett Warren <brett.warren@arm.com>
+---
+ src/arm/sysv.S | 33 ---------------------------------
+ 1 file changed, 33 deletions(-)
+
+diff --git a/src/arm/sysv.S b/src/arm/sysv.S
+index 63180a4..e3ce526 100644
+--- a/src/arm/sysv.S
++++ b/src/arm/sysv.S
+@@ -128,13 +128,8 @@ ARM_FUNC_START(ffi_call_VFP)
+ cfi_startproc
+
+ cmp r3, #3 @ load only d0 if possible
+-#ifdef __clang__
+- vldrle d0, [sp]
+- vldmgt sp, {d0-d7}
+-#else
+ ldcle p11, cr0, [r0] @ vldrle d0, [sp]
+ ldcgt p11, cr0, [r0], {16} @ vldmgt sp, {d0-d7}
+-#endif
+ add r0, r0, #64 @ discard the vfp register args
+ /* FALLTHRU */
+ ARM_FUNC_END(ffi_call_VFP)
+@@ -172,25 +167,13 @@ ARM_FUNC_START(ffi_call_SYSV)
+ nop
+ 0:
+ E(ARM_TYPE_VFP_S)
+-#ifdef __clang__
+- vstr s0, [r2]
+-#else
+ stc p10, cr0, [r2] @ vstr s0, [r2]
+-#endif
+ pop {fp,pc}
+ E(ARM_TYPE_VFP_D)
+-#ifdef __clang__
+- vstr d0, [r2]
+-#else
+ stc p11, cr0, [r2] @ vstr d0, [r2]
+-#endif
+ pop {fp,pc}
+ E(ARM_TYPE_VFP_N)
+-#ifdef __clang__
+- vstm r2, {d0-d3}
+-#else
+ stc p11, cr0, [r2], {8} @ vstm r2, {d0-d3}
+-#endif
+ pop {fp,pc}
+ E(ARM_TYPE_INT64)
+ str r1, [r2, #4]
+@@ -287,11 +270,7 @@ ARM_FUNC_START(ffi_closure_VFP)
+ add ip, sp, #16
+ sub sp, sp, #64+32 @ allocate frame
+ cfi_adjust_cfa_offset(64+32)
+-#ifdef __clang__
+- vstm sp, {d0-d7}
+-#else
+ stc p11, cr0, [sp], {16} @ vstm sp, {d0-d7}
+-#endif
+ stmdb sp!, {ip,lr}
+
+ /* See above. */
+@@ -320,25 +299,13 @@ ARM_FUNC_START_LOCAL(ffi_closure_ret)
+ cfi_rel_offset(lr, 4)
+ 0:
+ E(ARM_TYPE_VFP_S)
+-#ifdef __clang__
+- vldr s0, [r2]
+-#else
+ ldc p10, cr0, [r2] @ vldr s0, [r2]
+-#endif
+ ldm sp, {sp,pc}
+ E(ARM_TYPE_VFP_D)
+-#ifdef __clang__
+- vldr d0, [r2]
+-#else
+ ldc p11, cr0, [r2] @ vldr d0, [r2]
+-#endif
+ ldm sp, {sp,pc}
+ E(ARM_TYPE_VFP_N)
+-#ifdef __clang__
+- vldm r2, {d0-d3}
+-#else
+ ldc p11, cr0, [r2], {8} @ vldm r2, {d0-d3}
+-#endif
+ ldm sp, {sp,pc}
+ E(ARM_TYPE_INT64)
+ ldr r1, [r2, #4]
+--
+2.17.1
+