diff options
author | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2010-10-05 19:38:57 +0400 |
---|---|---|
committer | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2010-10-05 19:38:57 +0400 |
commit | 4847c2dd259c6731518a52949431b7bb2630a0b5 (patch) | |
tree | 2626c2cae746e25d16889203697728f0db641e05 | |
parent | 4931b37c8faf1eef7322cc82bf979885c770f4e0 (diff) | |
parent | e65bf047fe20ff090368a4150c5dfe1591e46c1b (diff) | |
download | openembedded-4847c2dd259c6731518a52949431b7bb2630a0b5.tar.gz |
Merge branch 'master' of git://git.openembedded.org/openembedded
-rw-r--r-- | recipes/linux/linux-2.6.24/hipox/defconfig | 12 | ||||
-rw-r--r-- | recipes/linux/linux-2.6.24/hipox/hipox-poe-enable.patch | 104 | ||||
-rw-r--r-- | recipes/linux/linux_2.6.24.bb | 1 |
3 files changed, 112 insertions, 5 deletions
diff --git a/recipes/linux/linux-2.6.24/hipox/defconfig b/recipes/linux/linux-2.6.24/hipox/defconfig index 1c67135ea5..b73e56a17d 100644 --- a/recipes/linux/linux-2.6.24/hipox/defconfig +++ b/recipes/linux/linux-2.6.24/hipox/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.24.7 -# Tue Sep 14 14:50:37 2010 +# Tue Oct 5 14:54:14 2010 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -182,6 +182,8 @@ CONFIG_HIPOX_PCI_RESET=y CONFIG_HIPOX_PCI_RESET_GPIO=27 CONFIG_HIPOX_OXE_INT2=y CONFIG_HIPOX_OXE_INT2_GPIO=34 +CONFIG_HIPOX_POE_ENABLE=y +CONFIG_HIPOX_POE_ENABLE_GPIO=28 # CONFIG_HIPOX_SATA_POWER_1 is not set # CONFIG_HIPOX_SATA_POWER_2 is not set CONFIG_FORCE_MAX_ZONEORDER=10 @@ -887,14 +889,14 @@ CONFIG_HW_RANDOM=m # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y -CONFIG_I2C=y +CONFIG_I2C=m CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_CHARDEV=m # # I2C Algorithms # -CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOBIT=m # CONFIG_I2C_ALGOPCF is not set # CONFIG_I2C_ALGOPCA is not set # CONFIG_I2C_ALGOOXSEMI is not set @@ -911,7 +913,7 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_I810 is not set # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set -CONFIG_I2C_HIPOX_BITBASH=y +CONFIG_I2C_HIPOX_BITBASH=m # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_PROSAVAGE is not set diff --git a/recipes/linux/linux-2.6.24/hipox/hipox-poe-enable.patch b/recipes/linux/linux-2.6.24/hipox/hipox-poe-enable.patch new file mode 100644 index 0000000000..6e2df15b05 --- /dev/null +++ b/recipes/linux/linux-2.6.24/hipox/hipox-poe-enable.patch @@ -0,0 +1,104 @@ +diff -Nurd linux-2.6.24.orig//arch/arm/mach-hipox/Kconfig linux-2.6.24/arch/arm/mach-hipox/Kconfig +--- linux-2.6.24.orig//arch/arm/mach-hipox/Kconfig 2010-09-30 13:05:01.000000000 +0200 ++++ linux-2.6.24/arch/arm/mach-hipox/Kconfig 2010-09-30 13:11:34.000000000 +0200 +@@ -255,6 +255,19 @@ + This defines the GPIO used to signal power state to + HIPOX board controller. + ++config HIPOX_POE_ENABLE ++ bool "Enable PoE board power switching using GPIO" ++ default y ++ help ++ Enable PoE board power switching using GPIO. ++ ++config HIPOX_POE_ENABLE_GPIO ++ int "GPIO line using as power switch for PoE board" ++ depends on HIPOX_POE_ENABLE ++ default 28 ++ help ++ This defines the GPIO used as power switch for the PoE board. ++ + config HIPOX_SATA_POWER_1 + bool "Allow control of SATA 1 disk power via GPIO" + default n +diff -Nurd linux-2.6.24.orig//arch/arm/mach-hipox/hipox.c linux-2.6.24/arch/arm/mach-hipox/hipox.c +--- linux-2.6.24.orig//arch/arm/mach-hipox/hipox.c 2010-09-30 13:05:02.000000000 +0200 ++++ linux-2.6.24/arch/arm/mach-hipox/hipox.c 2010-09-30 13:13:40.000000000 +0200 +@@ -72,6 +72,30 @@ + #define OXE_INT2_MASK (1UL << (OXE_INT2_NUM)) + #endif // CONFIG_HIPOX_OXE_INT2_GPIO + ++#ifdef CONFIG_HIPOX_POE_ENABLE_GPIO ++#if (CONFIG_HIPOX_POE_ENABLE_GPIO < 32) ++#define POE_ENABLE_NUM CONFIG_HIPOX_POE_ENABLE_GPIO ++#define POE_ENABLE_PRISEL_REG SYS_CTRL_GPIO_PRIMSEL_CTRL_0 ++#define POE_ENABLE_SECSEL_REG SYS_CTRL_GPIO_SECSEL_CTRL_0 ++#define POE_ENABLE_TERSEL_REG SYS_CTRL_GPIO_TERTSEL_CTRL_0 ++#define POE_ENABLE_QUASEL_REG SYS_CTRL_GPIO_PWMSEL_CTRL_0 ++#define POE_ENABLE_SET_OE_REG GPIO_A_OUTPUT_ENABLE_SET ++#define POE_ENABLE_OUTPUT_SET_REG GPIO_A_OUTPUT_SET ++#define POE_ENABLE_OUTPUT_CLR_REG GPIO_A_OUTPUT_CLEAR ++#else ++#define POE_ENABLE_NUM ((CONFIG_HIPOX_POE_ENABLE_GPIO) - 32) ++#define POE_ENABLE_PRISEL_REG SYS_CTRL_GPIO_PRIMSEL_CTRL_1 ++#define POE_ENABLE_SECSEL_REG SYS_CTRL_GPIO_SECSEL_CTRL_1 ++#define POE_ENABLE_TERSEL_REG SYS_CTRL_GPIO_TERTSEL_CTRL_1 ++#define POE_ENABLE_QUASEL_REG SYS_CTRL_GPIO_PWMSEL_CTRL_1 ++#define POE_ENABLE_SET_OE_REG GPIO_B_OUTPUT_ENABLE_SET ++#define POE_ENABLE_OUTPUT_SET_REG GPIO_B_OUTPUT_SET ++#define POE_ENABLE_OUTPUT_CLR_REG GPIO_B_OUTPUT_CLEAR ++#endif ++ ++#define POE_ENABLE_MASK (1UL << (POE_ENABLE_NUM)) ++#endif // CONFIG_HIPOX_POE_ENABLE_GPIO ++ + #ifdef CONFIG_HIPOX_PCI_RESET_GPIO + #if (CONFIG_HIPOX_PCI_RESET_GPIO < 32) + #define PCI_RESET_NUM CONFIG_HIPOX_PCI_RESET_GPIO +@@ -438,6 +462,22 @@ + writel(OXE_INT2_MASK, OXE_INT2_OUTPUT_SET_REG); + #endif // CONFIG_HIPOX_OXE_INT2 + ++#ifdef CONFIG_HIPOX_POE_ENABLE ++ printk("Enable POE_ENABLE\n"); ++ ++ // Disable primary, secondary and teriary GPIO functions on POE_ENABLE line ++ writel(readl(POE_ENABLE_PRISEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_PRISEL_REG); ++ writel(readl(POE_ENABLE_SECSEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_SECSEL_REG); ++ writel(readl(POE_ENABLE_TERSEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_TERSEL_REG); ++ writel(readl(POE_ENABLE_QUASEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_QUASEL_REG); ++ ++ // Enable GPIO output on POE_ENABLE line ++ writel(POE_ENABLE_MASK, POE_ENABLE_SET_OE_REG); ++ ++ // Set POE_ENABLE ++ writel(POE_ENABLE_MASK, POE_ENABLE_OUTPUT_SET_REG); ++#endif // CONFIG_HIPOX_POE_ENABLE ++ + #ifdef CONFIG_ARCH_HIPOX_UART1 + // Block reset UART1 + *(volatile u32*)SYS_CTRL_RSTEN_SET_CTRL = (1UL << SYS_CTRL_RSTEN_UART1_BIT); +@@ -1080,6 +1120,23 @@ + static void hipox_poweroff(void) + { + printk("Power off OXE810.\n"); ++ ++#ifdef CONFIG_HIPOX_POE_ENABLE ++ printk("Disable POE_ENABLE.\n"); ++ ++ // Disable primary, secondary and teriary GPIO functions on POE_ENABLE line ++ writel(readl(POE_ENABLE_PRISEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_PRISEL_REG); ++ writel(readl(POE_ENABLE_SECSEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_SECSEL_REG); ++ writel(readl(POE_ENABLE_TERSEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_TERSEL_REG); ++ writel(readl(POE_ENABLE_QUASEL_REG) & ~POE_ENABLE_MASK, POE_ENABLE_QUASEL_REG); ++ ++ // Enable GPIO output on POE_ENABLE line ++ writel(POE_ENABLE_MASK, POE_ENABLE_SET_OE_REG); ++ ++ // Reset POE_ENABLE ++ writel(POE_ENABLE_MASK, POE_ENABLE_OUTPUT_CLR_REG); ++#endif // CONFIG_HIPOX_POE_ENABLE ++ + #ifdef CONFIG_HIPOX_OXE_INT2 + printk("Disable OXE_INT2.\n"); + diff --git a/recipes/linux/linux_2.6.24.bb b/recipes/linux/linux_2.6.24.bb index 982038bf75..19190639ab 100644 --- a/recipes/linux/linux_2.6.24.bb +++ b/recipes/linux/linux_2.6.24.bb @@ -101,6 +101,7 @@ SRC_URI_append_hipox = " \ file://hipox-nand-vs-pci.patch \ file://hipox-nand-vs-nor.patch \ file://ox810-gmac-without-leon.patch \ + file://hipox-poe-enable.patch \ " EXTRA_OEMAKE_smartq5 = " OBJCOPY=${OBJCOPY}" |