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authorDenys Dmytriyenko <denis@denix.org>2009-03-17 14:32:59 -0400
committerDenys Dmytriyenko <denis@denix.org>2009-03-17 14:32:59 -0400
commit709c4d66e0b107ca606941b988bad717c0b45d9b (patch)
tree37ee08b1eb308f3b2b6426d5793545c38396b838 /recipes/gcc/gcc-csl-arm
parentfa6cd5a3b993f16c27de4ff82b42684516d433ba (diff)
downloadopenembedded-709c4d66e0b107ca606941b988bad717c0b45d9b.tar.gz
openembedded-709c4d66e0b107ca606941b988bad717c0b45d9b.tar.bz2
openembedded-709c4d66e0b107ca606941b988bad717c0b45d9b.zip
rename packages/ to recipes/ per earlier agreement
See links below for more details: http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326 http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816 Signed-off-by: Denys Dmytriyenko <denis@denix.org> Acked-by: Mike Westerhof <mwester@dls.net> Acked-by: Philip Balister <philip@balister.org> Acked-by: Khem Raj <raj.khem@gmail.com> Acked-by: Marcin Juszkiewicz <hrw@openembedded.org> Acked-by: Koen Kooi <koen@openembedded.org> Acked-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Diffstat (limited to 'recipes/gcc/gcc-csl-arm')
-rw-r--r--recipes/gcc/gcc-csl-arm/15342.patch22
-rw-r--r--recipes/gcc/gcc-csl-arm/arm-nolibfloat.patch24
-rw-r--r--recipes/gcc/gcc-csl-arm/arm-softfloat.patch16
-rw-r--r--recipes/gcc/gcc-csl-arm/cache-amnesia.patch13
-rw-r--r--recipes/gcc/gcc-csl-arm/fortran-static-linking.patch48
-rw-r--r--recipes/gcc/gcc-csl-arm/gcc-3.4.0-arm-lib1asm.patch24
-rw-r--r--recipes/gcc/gcc-csl-arm/gcc-3.4.4-eabi-bigendian.patch12
-rw-r--r--recipes/gcc/gcc-csl-arm/gcc-new-makeinfo.patch35
-rw-r--r--recipes/gcc/gcc-csl-arm/gcc34-arm-tune.patch9
-rw-r--r--recipes/gcc/gcc-csl-arm/gcc41-configure.in.patch22
-rw-r--r--recipes/gcc/gcc-csl-arm/gcc_optab_arm.patch95
-rw-r--r--recipes/gcc/gcc-csl-arm/ldflags.patch22
-rw-r--r--recipes/gcc/gcc-csl-arm/no-libfloat.patch11
-rw-r--r--recipes/gcc/gcc-csl-arm/pic-without-sl.patch303
-rw-r--r--recipes/gcc/gcc-csl-arm/pr34130.patch16
-rw-r--r--recipes/gcc/gcc-csl-arm/zecke-no-host-includes.patch31
-rw-r--r--recipes/gcc/gcc-csl-arm/zecke-xgcc-cpp.patch16
17 files changed, 719 insertions, 0 deletions
diff --git a/recipes/gcc/gcc-csl-arm/15342.patch b/recipes/gcc/gcc-csl-arm/15342.patch
new file mode 100644
index 0000000000..d0f3e72d47
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/15342.patch
@@ -0,0 +1,22 @@
+--- gcc/gcc/regrename.c~ 2004-01-14 17:55:20.000000000 +0000
++++ gcc/gcc/regrename.c 2005-02-28 07:24:25.893015200 +0000
+@@ -671,7 +671,8 @@
+
+ case SET:
+ scan_rtx (insn, &SET_SRC (x), class, action, OP_IN, 0);
+- scan_rtx (insn, &SET_DEST (x), class, action, OP_OUT, 0);
++ scan_rtx (insn, &SET_DEST (x), class, action,
++ GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0);
+ return;
+
+ case STRICT_LOW_PART:
+@@ -696,7 +697,8 @@
+ abort ();
+
+ case CLOBBER:
+- scan_rtx (insn, &SET_DEST (x), class, action, OP_OUT, 1);
++ scan_rtx (insn, &SET_DEST (x), class, action,
++ GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0);
+ return;
+
+ case EXPR_LIST:
diff --git a/recipes/gcc/gcc-csl-arm/arm-nolibfloat.patch b/recipes/gcc/gcc-csl-arm/arm-nolibfloat.patch
new file mode 100644
index 0000000000..c4897c0330
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/arm-nolibfloat.patch
@@ -0,0 +1,24 @@
+# Dimitry Andric <dimitry@andric.com>, 2004-05-01
+#
+# * Removed the extra -lfloat option from LIBGCC_SPEC, since it isn't needed
+# anymore. (The required functions are now in libgcc.)
+#
+# Fixes errors like
+# arm-softfloat-linux-gnu/3.4.0/../../../../arm-softfloat-linux-gnu/bin/ld: cannot find -lfloat
+# collect2: ld returned 1 exit status
+# make[2]: *** [arm-softfloat-linux-gnu/gcc-3.4.0-glibc-2.3.2/build-glibc/iconvdata/ISO8859-1.so] Error 1
+# when building glibc-2.3.3 with gcc-3.4.0 for arm-softfloat
+
+Index: gcc-4.0.2/gcc/config/arm/linux-elf.h
+===================================================================
+--- gcc-4.0.2.orig/gcc/config/arm/linux-elf.h 2005-03-04 16:14:01.000000000 +0000
++++ gcc-4.0.2/gcc/config/arm/linux-elf.h 2005-11-11 18:02:54.000000000 +0000
+@@ -56,7 +56,7 @@
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} %{mfloat-abi=soft*:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
diff --git a/recipes/gcc/gcc-csl-arm/arm-softfloat.patch b/recipes/gcc/gcc-csl-arm/arm-softfloat.patch
new file mode 100644
index 0000000000..5e1edd9208
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/arm-softfloat.patch
@@ -0,0 +1,16 @@
+Index: gcc-4.0.2/gcc/config/arm/t-linux
+===================================================================
+--- gcc-4.0.2.orig/gcc/config/arm/t-linux 2004-05-15 12:41:35.000000000 +0000
++++ gcc-4.0.2/gcc/config/arm/t-linux 2005-11-11 16:07:53.000000000 +0000
+@@ -4,7 +4,10 @@
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
++LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi _floatdidf _floatdisf _floatundisf _floatundidf
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
diff --git a/recipes/gcc/gcc-csl-arm/cache-amnesia.patch b/recipes/gcc/gcc-csl-arm/cache-amnesia.patch
new file mode 100644
index 0000000000..ef7cd111c5
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/cache-amnesia.patch
@@ -0,0 +1,13 @@
+diff --git a/gcc/configure b/gcc/configure
+index 44620ab..6e1830c 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -12272,7 +12272,7 @@ else
+ esac
+ saved_CFLAGS="${CFLAGS}"
+ CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \
+- ${realsrcdir}/configure \
++ CONFIG_SITE= ${realsrcdir}/configure --cache-file=./other.cache \
+ --enable-languages=${enable_languages-all} \
+ --target=$target_alias --host=$build_alias --build=$build_alias
+ CFLAGS="${saved_CFLAGS}"
diff --git a/recipes/gcc/gcc-csl-arm/fortran-static-linking.patch b/recipes/gcc/gcc-csl-arm/fortran-static-linking.patch
new file mode 100644
index 0000000000..3dd6321dc3
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/fortran-static-linking.patch
@@ -0,0 +1,48 @@
+f951 (fortran) links to MPFR and GMP of our staging area but when executing
+the command the libs can not be found. Use rpath like all the other apps in
+our staging bin/ directory.
+
+Patch the configure to avoid the regeneration...
+
+Index: gcc-4.2.2/configure
+===================================================================
+--- gcc-4.2.2.orig/configure 2008-01-15 23:23:41.000000000 +0100
++++ gcc-4.2.2/configure 2008-01-15 23:25:20.000000000 +0100
+@@ -2278,14 +2278,14 @@
+
+
+ if test "x$with_mpfr" != x; then
+- gmplibs="-L$with_mpfr/lib $gmplibs"
++ gmplibs="-static -L$with_mpfr/lib $gmplibs"
+ gmpinc="-I$with_mpfr/include"
+ fi
+ if test "x$with_mpfr_include" != x; then
+ gmpinc="-I$with_mpfr_include"
+ fi
+ if test "x$with_mpfr_lib" != x; then
+- gmplibs="-L$with_mpfr_lib $gmplibs"
++ gmplibs="-static -L$with_mpfr_lib $gmplibs"
+ fi
+
+ # Specify a location for gmp
+Index: gcc-4.2.2/configure.in
+===================================================================
+--- gcc-4.2.2.orig/configure.in 2008-01-15 23:23:41.000000000 +0100
++++ gcc-4.2.2/configure.in 2008-01-15 23:24:36.000000000 +0100
+@@ -1066,14 +1066,14 @@
+ AC_ARG_WITH(mpfr_lib, [ --with-mpfr-lib=PATH Specify the directory for the installed MPFR library])
+
+ if test "x$with_mpfr" != x; then
+- gmplibs="-L$with_mpfr/lib $gmplibs"
++ gmplibs="-static -L$with_mpfr/lib $gmplibs"
+ gmpinc="-I$with_mpfr/include"
+ fi
+ if test "x$with_mpfr_include" != x; then
+ gmpinc="-I$with_mpfr_include"
+ fi
+ if test "x$with_mpfr_lib" != x; then
+- gmplibs="-L$with_mpfr_lib $gmplibs"
++ gmplibs="-static -L$with_mpfr_lib $gmplibs"
+ fi
+
+ # Specify a location for gmp
diff --git a/recipes/gcc/gcc-csl-arm/gcc-3.4.0-arm-lib1asm.patch b/recipes/gcc/gcc-csl-arm/gcc-3.4.0-arm-lib1asm.patch
new file mode 100644
index 0000000000..cf17da6a02
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/gcc-3.4.0-arm-lib1asm.patch
@@ -0,0 +1,24 @@
+# Fixes errors like the following when building glibc (or any other executable
+# or shared library) when using gcc 3.4.0 for ARM with softfloat:
+#
+# .../libc_pic.os(.text+0x15834): In function `__modf': undefined reference to `__subdf3'
+# .../libc_pic.os(.text+0x158b8): In function `__modf': undefined reference to `__subdf3'
+# .../libc_pic.os(.text+0x1590c): In function `scalbn': undefined reference to `__muldf3'
+# .../libc_pic.os(.text+0x15e94): In function `__ldexpf': undefined reference to `__eqsf2'
+# .../libc_pic.os(.text+0xcee4c): In function `monstartup': undefined reference to `__fixsfsi'
+
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/t-linux gcc-3.4.0/gcc/config/arm/t-linux
+--- gcc-3.4.0-orig/gcc/config/arm/t-linux 2003-09-20 23:09:07.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/t-linux 2004-05-01 20:31:59.102846400 +0200
+@@ -4,7 +4,10 @@
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
++LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi _floatdidf _floatdisf
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
diff --git a/recipes/gcc/gcc-csl-arm/gcc-3.4.4-eabi-bigendian.patch b/recipes/gcc/gcc-csl-arm/gcc-3.4.4-eabi-bigendian.patch
new file mode 100644
index 0000000000..e6cc42bb65
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/gcc-3.4.4-eabi-bigendian.patch
@@ -0,0 +1,12 @@
+--- gcc-2005q3/gcc/config/arm/linux-eabi.h~ 2007-07-10 09:19:47.000000000 +0930
++++ gcc-2005q3/gcc/config/arm/linux-eabi.h 2007-07-10 10:42:37.000000000 +0930
+@@ -48,7 +48,8 @@
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm10tdmi
+
+ #undef SUBTARGET_EXTRA_LINK_SPEC
+-#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux_eabi"
++#define SUBTARGET_EXTRA_LINK_SPEC \
++ " %{mbig-endian:-m armelfb_linux_eabi} %{mlittle-endian:-m armelf_linux_eabi} "
+
+ /* Use ld-linux.so.3 so that it will be possible to run "classic"
+ GNU/Linux binaries on an EABI system. */
diff --git a/recipes/gcc/gcc-csl-arm/gcc-new-makeinfo.patch b/recipes/gcc/gcc-csl-arm/gcc-new-makeinfo.patch
new file mode 100644
index 0000000000..b984605af7
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/gcc-new-makeinfo.patch
@@ -0,0 +1,35 @@
+---
+ configure | 2 +-
+ configure.in | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- gcc-2006q1.orig/configure
++++ gcc-2006q1/configure
+@@ -3453,11 +3453,11 @@ case " $build_configdirs " in
+ *)
+
+ # For an installed makeinfo, we require it to be from texinfo 4.2 or
+ # higher, else we use the "missing" dummy.
+ if ${MAKEINFO} --version \
+- | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[2-9]|[5-9])' >/dev/null 2>&1; then
++ | egrep 'texinfo[^0-9]*(4\.([6-9]|[1-9][0-9])|[5-9]|[1-9][0-9])' >/dev/null 2>&1; then
+ :
+ else
+ MAKEINFO="$MISSING makeinfo"
+ fi
+ ;;
+--- gcc-2006q1.orig/configure.in
++++ gcc-2006q1/configure.in
+@@ -2078,11 +2078,11 @@ case " $build_configdirs " in
+ *)
+ changequote(,)
+ # For an installed makeinfo, we require it to be from texinfo 4.2 or
+ # higher, else we use the "missing" dummy.
+ if ${MAKEINFO} --version \
+- | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[2-9]|[5-9])' >/dev/null 2>&1; then
++ | egrep 'texinfo[^0-9]*(4\.([6-9]|[1-9][0-9])|[5-9]|[1-9][0-9])' >/dev/null 2>&1; then
+ :
+ else
+ MAKEINFO="$MISSING makeinfo"
+ fi
+ ;;
diff --git a/recipes/gcc/gcc-csl-arm/gcc34-arm-tune.patch b/recipes/gcc/gcc-csl-arm/gcc34-arm-tune.patch
new file mode 100644
index 0000000000..cdb20bef9b
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/gcc34-arm-tune.patch
@@ -0,0 +1,9 @@
+--- gcc-3.4.0/gcc/config/arm/linux-elf.h.arm-tune 2004-01-31 01:18:11.000000000 -0500
++++ gcc-3.4.0/gcc/config/arm/linux-elf.h 2004-04-24 18:19:10.000000000 -0400
+@@ -126,3 +126,6 @@
+
+ #define LINK_GCC_C_SEQUENCE_SPEC \
+ "%{static:--start-group} %G %L %{static:--end-group}%{!static:%G}"
++
++/* Tune for XScale. */
++#define TARGET_TUNE_DEFAULT TARGET_CPU_xscale
diff --git a/recipes/gcc/gcc-csl-arm/gcc41-configure.in.patch b/recipes/gcc/gcc-csl-arm/gcc41-configure.in.patch
new file mode 100644
index 0000000000..3d33bcb978
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/gcc41-configure.in.patch
@@ -0,0 +1,22 @@
+--- gcc-3.4.4/configure.in.orig 2005-08-09 19:57:51.504323183 -0700
++++ gcc-3.4.4/configure.in 2005-08-09 20:00:12.073168623 -0700
+@@ -1907,7 +1907,7 @@
+ *) gxx_include_dir=${with_gxx_include_dir} ;;
+ esac
+
+-FLAGS_FOR_TARGET=
++FLAGS_FOR_TARGET="$ARCH_FLAGS_FOR_TARGET"
+ case " $target_configdirs " in
+ *" newlib "*)
+ case " $target_configargs " in
+--- gcc-3.4.4/configure.orig 2005-08-09 21:02:29.668360660 -0700
++++ gcc-3.4.4/configure 2005-08-09 21:02:50.157649970 -0700
+@@ -2669,7 +2669,7 @@
+ *) gxx_include_dir=${with_gxx_include_dir} ;;
+ esac
+
+-FLAGS_FOR_TARGET=
++FLAGS_FOR_TARGET="$ARCH_FLAGS_FOR_TARGET"
+ case " $target_configdirs " in
+ *" newlib "*)
+ case " $target_configargs " in
diff --git a/recipes/gcc/gcc-csl-arm/gcc_optab_arm.patch b/recipes/gcc/gcc-csl-arm/gcc_optab_arm.patch
new file mode 100644
index 0000000000..fa21b26554
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/gcc_optab_arm.patch
@@ -0,0 +1,95 @@
+ARM is the only architecture that has a helper function that returns
+an unbiased result. This fix is trivial enough that we can show it
+doesn't effect any of the other arches. Can we consider this a
+regression fix since it used to work until the helper was added :}
+
+Tested with no regressions on x86_64-pc-linux-gnu and arm-none-eabi.
+
+Cheers,
+Carlos.
+--
+Carlos O'Donell
+CodeSourcery
+carlos@codesourcery.com
+(650) 331-3385 x716
+
+gcc/
+
+2006-01-27 Carlos O'Donell <carlos@codesourcery.com>
+
+ * optabs.c (prepare_cmp_insn): If unbaised and unsigned then bias
+ the comparison routine return.
+
+gcc/testsuite/
+
+2006-01-27 Carlos O'Donell <carlos@codesourcery.com>
+
+ * gcc.dg/unsigned-long-compare.c: New test.
+
+Index: gcc/optabs.c
+===================================================================
+--- 1/gcc/optabs.c (revision 110300)
++++ 2/gcc/optabs.c (working copy)
+@@ -3711,18 +3711,24 @@
+ result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
+ word_mode, 2, x, mode, y, mode);
+
++ /* There are two kinds of comparison routines. Biased routines
++ return 0/1/2, and unbiased routines return -1/0/1. Other parts
++ of gcc expect that the comparison operation is equivalent
++ to the modified comparison. For signed comparisons compare the
++ result against 1 in the unbiased case, and zero in the biased
++ case. For unsigned comparisons always compare against 1 after
++ biasing the unbased result by adding 1. This gives us a way to
++ represent LTU. */
+ *px = result;
+ *pmode = word_mode;
+- if (TARGET_LIB_INT_CMP_BIASED)
+- /* Integer comparison returns a result that must be compared
+- against 1, so that even if we do an unsigned compare
+- afterward, there is still a value that can represent the
+- result "less than". */
+- *py = const1_rtx;
+- else
++ *py = const1_rtx;
++
++ if (!TARGET_LIB_INT_CMP_BIASED)
+ {
+- *py = const0_rtx;
+- *punsignedp = 1;
++ if (*punsignedp)
++ *px = plus_constant (result, 1);
++ else
++ *py = const0_rtx;
+ }
+ return;
+ }
+Index: gcc/testsuite/gcc.dg/unsigned-long-compare.c
+===================================================================
+--- 1/gcc/testsuite/gcc.dg/unsigned-long-compare.c (revision 0)
++++ 2/gcc/testsuite/gcc.dg/unsigned-long-compare.c (revision 0)
+@@ -0,0 +1,24 @@
++/* Copyright (C) 2006 Free Software Foundation, Inc. */
++/* Contributed by Carlos O'Donell on 2006-01-27 */
++
++/* Test a division corner case where the expression simplifies
++ to a comparison, and the optab expansion is wrong. The optab
++ expansion emits a function whose return is unbiased and needs
++ adjustment. */
++/* Origin: Carlos O'Donell <carlos@codesourcery.com> */
++/* { dg-do run { target arm-*-*eabi* } } */
++/* { dg-options "" } */
++#include <stdlib.h>
++
++#define BIG_CONSTANT 0xFFFFFFFF80000000ULL
++
++int main (void)
++{
++ unsigned long long OneULL = 1ULL;
++ unsigned long long result;
++
++ result = OneULL / BIG_CONSTANT;
++ if (result)
++ abort ();
++ exit (0);
++}
diff --git a/recipes/gcc/gcc-csl-arm/ldflags.patch b/recipes/gcc/gcc-csl-arm/ldflags.patch
new file mode 100644
index 0000000000..9576f60778
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/ldflags.patch
@@ -0,0 +1,22 @@
+--- /tmp/Makefile.in 2006-02-23 20:56:01.399758728 +0100
++++ gcc-4.1-20060217/Makefile.in 2006-02-23 20:56:16.874406224 +0100
+@@ -334,7 +334,7 @@
+ CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
+ LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates
+-LDFLAGS_FOR_TARGET =
++LDFLAGS_FOR_TARGET = @LDFLAGS@
+ PICFLAG_FOR_TARGET =
+
+ # ------------------------------------
+--- /tmp/Makefile.tpl 2006-02-23 20:50:34.077519272 +0100
++++ gcc-4.1-20060217/Makefile.tpl 2006-02-23 21:04:31.092273688 +0100
+@@ -337,7 +337,7 @@
+ CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
+ LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates
+-LDFLAGS_FOR_TARGET =
++LDFLAGS_FOR_TARGET = @LDFLAGS@
+ PICFLAG_FOR_TARGET =
+
+ # ------------------------------------
diff --git a/recipes/gcc/gcc-csl-arm/no-libfloat.patch b/recipes/gcc/gcc-csl-arm/no-libfloat.patch
new file mode 100644
index 0000000000..e5d12cfb4f
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/no-libfloat.patch
@@ -0,0 +1,11 @@
+--- gcc/gcc/config/arm/linux-elf.h.old 2005-04-20 00:46:28.923375320 +0100
++++ gcc/gcc/config/arm/linux-elf.h 2005-04-20 00:46:34.181575952 +0100
+@@ -56,7 +56,7 @@
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} %{mfloat-abi=soft*:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
diff --git a/recipes/gcc/gcc-csl-arm/pic-without-sl.patch b/recipes/gcc/gcc-csl-arm/pic-without-sl.patch
new file mode 100644
index 0000000000..9a49794da4
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/pic-without-sl.patch
@@ -0,0 +1,303 @@
+Index: gcc/config/arm/arm-protos.h
+===================================================================
+RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm-protos.h,v
+retrieving revision 1.60.4.20
+diff -u -r1.60.4.20 arm-protos.h
+--- gcc/config/arm/arm-protos.h 29 Mar 2005 03:00:11 -0000 1.60.4.20
++++ gcc/config/arm/arm-protos.h 23 Apr 2005 04:41:06 -0000
+@@ -64,6 +64,7 @@
+ extern enum reg_class vfp_secondary_reload_class (enum machine_mode, rtx);
+ extern int tls_symbolic_operand (rtx, enum machine_mode);
+ extern bool arm_tls_operand_p (rtx x);
++extern bool arm_pc_pic_operand_p (rtx x);
+
+ /* Predicates. */
+ extern int s_register_operand (rtx, enum machine_mode);
+Index: gcc/config/arm/arm.c
+===================================================================
+RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm.c,v
+retrieving revision 1.303.2.79
+diff -u -r1.303.2.79 arm.c
+--- gcc/config/arm/arm.c 12 Apr 2005 06:17:07 -0000 1.303.2.79
++++ gcc/config/arm/arm.c 23 Apr 2005 04:41:09 -0000
+@@ -1003,7 +1003,7 @@
+
+ /* If stack checking is disabled, we can use r10 as the PIC register,
+ which keeps r9 available. */
+- if (flag_pic)
++ if (0 && flag_pic)
+ arm_pic_register = TARGET_APCS_STACK ? 9 : 10;
+
+ if (TARGET_APCS_FLOAT)
+@@ -3120,6 +3120,10 @@
+ rtx
+ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
+ {
++ if (GET_CODE (orig) == UNSPEC
++ && XINT (orig, 1) == UNSPEC_GOTSLOTPC)
++ abort ();
++
+ if (GET_CODE (orig) == SYMBOL_REF
+ || GET_CODE (orig) == LABEL_REF)
+ {
+@@ -3149,27 +3153,80 @@
+ else
+ address = reg;
+
+- if (TARGET_ARM)
+- emit_insn (gen_pic_load_addr_arm (address, orig));
+- else
+- emit_insn (gen_pic_load_addr_thumb (address, orig));
++ if (arm_pic_register != INVALID_REGNUM)
++ {
++ /* Using GP-based PIC addressing. */
++ if (TARGET_ARM)
++ emit_insn (gen_pic_load_addr_arm (address, orig));
++ else
++ emit_insn (gen_pic_load_addr_thumb (address, orig));
++
++ if ((GET_CODE (orig) == LABEL_REF
++ || (GET_CODE (orig) == SYMBOL_REF &&
++ SYMBOL_REF_LOCAL_P (orig)))
++ && NEED_GOT_RELOC)
++ pic_ref = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, address);
++ else
++ {
++ pic_ref = gen_rtx_MEM (Pmode,
++ gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
++ address));
++ RTX_UNCHANGING_P (pic_ref) = 1;
++ }
+
+- if ((GET_CODE (orig) == LABEL_REF
+- || (GET_CODE (orig) == SYMBOL_REF &&
+- SYMBOL_REF_LOCAL_P (orig)))
+- && NEED_GOT_RELOC)
+- pic_ref = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, address);
++ current_function_uses_pic_offset_table = 1;
++ }
+ else
+ {
+- pic_ref = gen_rtx_MEM (Pmode,
+- gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
+- address));
+- RTX_UNCHANGING_P (pic_ref) = 1;
++ /* Using PC-based PIC addressing. */
++ rtx label, tmp;
++ int offset;
++
++ label = gen_label_rtx ();
++ offset = TARGET_ARM ? 8 : 4;
++
++ if (GET_CODE (orig) == LABEL_REF
++ || (GET_CODE (orig) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (orig)))
++ {
++ /* This symbol is defined locally. We don't need a GOT entry. */
++ tmp = gen_rtx_MINUS (Pmode, gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM), gen_rtx_PLUS (Pmode,
++ gen_rtx_LABEL_REF (Pmode, label),
++ GEN_INT (offset)));
++
++ load_tls_operand (tmp, address);
++
++ if (TARGET_ARM)
++ emit_insn (gen_pic_add_dot_plus_eight (address, label));
++ else
++ emit_insn (gen_pic_add_dot_plus_four (address, label));
++ }
++ else
++ {
++ rtx x = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_GOTSLOTPC);
++ rtx dummy_label;
++
++ dummy_label = gen_label_rtx ();
++ LABEL_PRESERVE_P (dummy_label) = 1;
++ LABEL_NUSES (dummy_label) = 1;
++
++ tmp = gen_rtx_MINUS (Pmode, x, gen_rtx_PLUS (Pmode,
++ gen_rtx_LABEL_REF (Pmode, label),
++ GEN_INT (offset)));
++
++ load_tls_operand (tmp, address);
++
++ if (TARGET_ARM)
++ emit_insn (gen_tls_load_dot_plus_eight (address, address, label, dummy_label));
++ else
++ emit_insn (gen_tls_load_dot_plus_four (address, address, label, dummy_label));
++ }
++
++ pic_ref = address;
+ }
+
+ insn = emit_move_insn (reg, pic_ref);
+ #endif
+- current_function_uses_pic_offset_table = 1;
++
+ /* Put a REG_EQUAL note on this insn, so that it can be optimized
+ by loop. */
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
+@@ -3179,11 +3236,17 @@
+ else if (GET_CODE (orig) == CONST)
+ {
+ rtx base, offset;
++ bool minus = FALSE;
+
+ if (GET_CODE (XEXP (orig, 0)) == PLUS
+ && XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
+ return orig;
+
++ if (GET_CODE (XEXP (orig, 0)) == MINUS
++ && GET_CODE (XEXP (XEXP (orig, 0), 0)) == UNSPEC
++ && XINT (XEXP (XEXP (orig, 0), 0), 1) == UNSPEC_GOTSLOTPC)
++ return orig;
++
+ if (GET_CODE (XEXP (orig, 0)) == UNSPEC)
+ return orig;
+
+@@ -3201,6 +3264,13 @@
+ offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
+ base == reg ? 0 : reg);
+ }
++ else if (GET_CODE (XEXP (orig, 0)) == MINUS)
++ {
++ minus = TRUE;
++ base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
++ offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
++ base == reg ? 0 : reg);
++ }
+ else
+ abort ();
+
+@@ -3228,7 +3298,7 @@
+ return reg;
+ }
+
+- return gen_rtx_PLUS (Pmode, base, offset);
++ return minus ? gen_rtx_MINUS (Pmode, base, offset) : gen_rtx_PLUS (Pmode, base, offset);
+ }
+
+ return orig;
+@@ -3267,7 +3337,7 @@
+ rtx l1, pic_tmp, pic_tmp2, pic_rtx;
+ rtx global_offset_table;
+
+- if (current_function_uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
++ if (current_function_uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE || arm_pic_register == INVALID_REGNUM)
+ return;
+
+ if (!flag_pic)
+@@ -3341,8 +3411,11 @@
+ static int
+ pcrel_constant_p (rtx x)
+ {
++ if (GET_CODE (x) == CONST)
++ return pcrel_constant_p (XEXP (x, 0));
++
+ if (GET_CODE (x) == MINUS)
+- return symbol_mentioned_p (XEXP (x, 0)) && label_mentioned_p (XEXP (x, 1));
++ return (((GET_CODE (XEXP (x, 0)) == UNSPEC && XINT (XEXP (x, 0), 1) == UNSPEC_PIC_SYM)) || symbol_mentioned_p (XEXP (x, 0))) && label_mentioned_p (XEXP (x, 1));
+
+ if (GET_CODE (x) == UNSPEC
+ && XINT (x, 1) == UNSPEC_TLS
+@@ -3946,12 +4019,32 @@
+ return SYMBOL_REF_TLS_MODEL (op);
+ }
+
++bool
++arm_pc_pic_operand_p (rtx op)
++{
++ if (GET_CODE (op) == CONST
++ && GET_CODE (XEXP (op, 0)) == MINUS
++ && GET_CODE (XEXP (XEXP (op, 0), 0)) == UNSPEC
++ && XINT (XEXP (XEXP (op, 0), 0), 1) == UNSPEC_GOTSLOTPC)
++ return 1;
++
++ if (GET_CODE (op) == CONST
++ && GET_CODE (XEXP (op, 0)) == MINUS
++ && GET_CODE (XEXP (XEXP (op, 0), 0)) == UNSPEC
++ && XINT (XEXP (XEXP (op, 0), 0), 1) == UNSPEC_PIC_SYM)
++ return 1;
++
++ return 0;
++}
++
+ /* Valid input to a move instruction. */
+ int
+ move_input_operand (rtx op, enum machine_mode mode)
+ {
+ if (tls_symbolic_operand (op, mode))
+ return 0;
++ if (pcrel_constant_p (op))
++ return 1;
+ return general_operand (op, mode);
+ }
+
+@@ -15634,11 +15727,34 @@
+ return TRUE;
+ }
+
++static bool
++arm_emit_got_decoration (FILE *fp, rtx x)
++{
++ rtx val;
++
++ val = XVECEXP (x, 0, 0);
++
++ fputs ("_gotslotpc_(", fp);
++
++ output_addr_const (fp, val);
++
++ fputc (')', fp);
++
++ return TRUE;
++}
++
+ bool
+ arm_output_addr_const_extra (FILE *fp, rtx x)
+ {
+ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLS)
+ return arm_emit_tls_decoration (fp, x);
++ else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_GOTSLOTPC)
++ return arm_emit_got_decoration (fp, x);
++ else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_PIC_SYM)
++ {
++ output_addr_const (fp, XVECEXP (x, 0, 0));
++ return TRUE;
++ }
+ else if (GET_CODE (x) == CONST_VECTOR)
+ return arm_emit_vector_const (fp, x);
+
+Index: gcc/config/arm/arm.md
+===================================================================
+RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm.md,v
+retrieving revision 1.145.2.31
+diff -u -r1.145.2.31 arm.md
+--- gcc/config/arm/arm.md 28 Mar 2005 19:04:37 -0000 1.145.2.31
++++ gcc/config/arm/arm.md 23 Apr 2005 04:41:11 -0000
+@@ -88,6 +88,7 @@
+ (UNSPEC_WMADDS 18) ; Used by the intrinsic form of the iWMMXt WMADDS instruction.
+ (UNSPEC_WMADDU 19) ; Used by the intrinsic form of the iWMMXt WMADDU instruction.
+ (UNSPEC_TLS 20) ; A symbol that has been treated properly for TLS usage.
++ (UNSPEC_GOTSLOTPC 21)
+ ]
+ )
+
+@@ -4179,7 +4180,8 @@
+ && (CONSTANT_P (operands[1])
+ || symbol_mentioned_p (operands[1])
+ || label_mentioned_p (operands[1]))
+- && ! tls_mentioned_p (operands[1]))
++ && ! tls_mentioned_p (operands[1])
++ && ! arm_pc_pic_operand_p (operands[1]))
+ operands[1] = legitimize_pic_address (operands[1], SImode,
+ (no_new_pseudos ? operands[0] : 0));
+ }
+@@ -4412,7 +4414,8 @@
+ (mem:SI (unspec:SI [(plus:SI (match_dup 0)
+ (const (plus:SI (pc) (const_int 8))))]
+ UNSPEC_PIC_BASE)))
+- (use (label_ref (match_operand 1 "" "")))])]
++ (use (label_ref (match_operand 1 "" "")))
++ (use (label_ref (match_operand 1 "" "")))])]
+ ""
+ )
+
diff --git a/recipes/gcc/gcc-csl-arm/pr34130.patch b/recipes/gcc/gcc-csl-arm/pr34130.patch
new file mode 100644
index 0000000000..415335f4b4
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/pr34130.patch
@@ -0,0 +1,16 @@
+Index: gcc-4.1.2/gcc/fold-const.c
+===================================================================
+--- gcc-4.1.2.orig/gcc/fold-const.c 2007-11-21 18:53:42.000000000 +0100
++++ gcc-4.1.2/gcc/fold-const.c 2007-11-21 18:56:26.000000000 +0100
+@@ -5339,7 +5339,10 @@
+ }
+ break;
+ }
+- /* FALLTHROUGH */
++ /* If the constant is negative, we cannot simplify this. */
++ if (tree_int_cst_sgn (c) == -1)
++ break;
++ /* FALLTHROUGH */
+ case NEGATE_EXPR:
+ if ((t1 = extract_muldiv (op0, c, code, wide_type)) != 0)
+ return fold_build1 (tcode, ctype, fold_convert (ctype, t1));
diff --git a/recipes/gcc/gcc-csl-arm/zecke-no-host-includes.patch b/recipes/gcc/gcc-csl-arm/zecke-no-host-includes.patch
new file mode 100644
index 0000000000..6afb10d6ef
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/zecke-no-host-includes.patch
@@ -0,0 +1,31 @@
+Index: gcc-4.0.2/gcc/c-incpath.c
+===================================================================
+--- gcc-4.0.2.orig/gcc/c-incpath.c 2005-01-23 16:05:27.000000000 +0100
++++ gcc-4.0.2/gcc/c-incpath.c 2006-05-15 21:23:02.000000000 +0200
+@@ -350,6 +350,26 @@
+ p->construct = 0;
+ p->user_supplied_p = user_supplied_p;
+
++#ifdef CROSS_COMPILE
++ /* A common error when cross compiling is including
++ host headers. This code below will try to fail fast
++ for cross compiling. Currently we consider /usr/include,
++ /opt/include and /sw/include as harmful. */
++ {
++ /* printf("Adding Path: %s\n", p->name ); */
++ if( strstr(p->name, "/usr/include" ) == p->name ) {
++ fprintf(stderr, _("CROSS COMPILE Badness: /usr/include in INCLUDEPATH: %s\n"), p->name);
++ abort();
++ } else if( strstr(p->name, "/sw/include") == p->name ) {
++ fprintf(stderr, _("CROSS COMPILE Badness: /sw/include in INCLUDEPATH: %s\n"), p->name);
++ abort();
++ } else if( strstr(p->name, "/opt/include") == p->name ) {
++ fprintf(stderr, _("CROSS COMPILE Badness: /opt/include in INCLUDEPATH: %s\n"), p->name);
++ abort();
++ }
++ }
++#endif
++
+ add_cpp_dir_path (p, chain);
+ }
+
diff --git a/recipes/gcc/gcc-csl-arm/zecke-xgcc-cpp.patch b/recipes/gcc/gcc-csl-arm/zecke-xgcc-cpp.patch
new file mode 100644
index 0000000000..3ccd124764
--- /dev/null
+++ b/recipes/gcc/gcc-csl-arm/zecke-xgcc-cpp.patch
@@ -0,0 +1,16 @@
+upstream: n/a
+comment: Use the preprocessor we have just compiled instead the one of
+the system. There might be incompabilities between us and them.
+
+Index: gcc-4.1.1/Makefile.in
+===================================================================
+--- gcc-4.1.1.orig/Makefile.in 2006-08-06 13:32:44.000000000 +0200
++++ gcc-4.1.1/Makefile.in 2006-08-06 13:32:46.000000000 +0200
+@@ -194,6 +194,7 @@
+ AS="$(COMPILER_AS_FOR_TARGET)"; export AS; \
+ CC="$(CC_FOR_TARGET)"; export CC; \
+ CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++ CPP="$(CC_FOR_TARGET) -E"; export CPP; \
+ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \
+ CPPFLAGS="$(CPPFLAGS_FOR_TARGET)"; export CPPFLAGS; \
+ CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \