linux-omap4: readd some missing patches

Signed-off-by: Koen Kooi <koen@openembedded.org>

9 files changed, 14 insertions, 445 deletions

diff --git a/recipes/linux/linux-omap4/0001-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch b/recipes/linux/linux-omap4/0001-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch
deleted file mode 100644
index 672cdf3508..0000000000
--- a/recipes/linux/linux-omap4/0001-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 77a74f32cba37392007815558ab8055ffc95604f Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Mon, 13 Oct 2008 20:32:16 +0100
-Subject: [PATCH 1/8] ARM: Add prompt for CONFIG_ALIGNMENT_TRAP
-
-This adds a prompt text for CONFIG_ALIGNMENT_TRAP, thus making it
-visible in make *config.
-
-Signed-off-by: Mans Rullgard <mans@mansr.com>
----
- arch/arm/Kconfig |    2 +-
- 1 files changed, 1 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 4432566..4940c98 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1361,7 +1361,7 @@ config LEDS_CPU
- 	  will overrule the CPU usage LED.
- 
- config ALIGNMENT_TRAP
--	bool
-+	bool "Enable alignment trap"
- 	depends on CPU_CP15_MMU
- 	default y if !ARCH_EBSA110
- 	select HAVE_PROC_CPU if PROC_FS
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4/0008-tiler-avoid-lock-ups-due-to-unmapped-DMM-entries.patch b/recipes/linux/linux-omap4/0001-tiler-avoid-lock-ups-due-to-unmapped-DMM-entries.patch
index 0a92ad46a5..99194f6fc7 100644
--- a/recipes/linux/linux-omap4/0008-tiler-avoid-lock-ups-due-to-unmapped-DMM-entries.patch
+++ b/recipes/linux/linux-omap4/0001-tiler-avoid-lock-ups-due-to-unmapped-DMM-entries.patch
@@ -1,7 +1,7 @@
-From 5154c4370017e92498f98d35446baefd8b150e84 Mon Sep 17 00:00:00 2001
+From 694125c6684f8bafbf5c4502659f1322fae33af2 Mon Sep 17 00:00:00 2001
 From: Rob Clark <rob@ti.com>
 Date: Sat, 10 Jul 2010 18:03:16 -0500
-Subject: [PATCH 8/8] tiler: avoid lock-ups due to unmapped DMM entries
+Subject: [PATCH 1/7] tiler: avoid lock-ups due to unmapped DMM entries
 
 Due to the address remapping done for 2d buffers, when a 2d buffer is
 allocated by userspace, it is possible that only partial pages map to
@@ -73,7 +73,7 @@ index 4ee59bd..c9c9aa5 100644
  		return tmm;
  	}
 diff --git a/drivers/media/video/tiler/tiler.c b/drivers/media/video/tiler/tiler.c
-index 567e620..d05e5e2 100644
+index 1c117eb..9ce065c 100644
 --- a/drivers/media/video/tiler/tiler.c
 +++ b/drivers/media/video/tiler/tiler.c
 @@ -125,6 +125,9 @@ static struct tmm *tmm[TILER_FORMATS];
@@ -116,15 +116,15 @@ index 567e620..d05e5e2 100644
  }
  
  static s32 tiler_open(struct inode *ip, struct file *filp)
-@@ -1511,6 +1521,7 @@ static s32 __init tiler_init(void)
+@@ -1509,6 +1519,7 @@ static s32 __init tiler_init(void)
  	struct tcm_pt div_pt;
  	struct tcm *sita = NULL;
  	struct tmm *tmm_pat = NULL;
 +	struct tcm_area area = {0};
  
- 	/**
- 	  * Array of physical pages for PAT programming, which must be a 16-byte
-@@ -1582,6 +1593,20 @@ static s32 __init tiler_init(void)
+ 	if (!cpu_is_omap44xx())
+ 		return 0;
+@@ -1583,6 +1594,20 @@ static s32 __init tiler_init(void)
  	BLOCKING_INIT_NOTIFIER_HEAD(&tiler_device->notifier);
  	id = 0xda7a000;
  
diff --git a/recipes/linux/linux-omap4/0002-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch b/recipes/linux/linux-omap4/0002-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch
deleted file mode 100644
index 294b1f116e..0000000000
--- a/recipes/linux/linux-omap4/0002-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 1be41e36a677ca08fe3cfd7e4bb57a2d3ac68560 Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Sat, 28 Mar 2009 13:21:55 +0000
-Subject: [PATCH 2/8] ARM: Print warning on alignment trap in kernel mode
-
-Signed-off-by: Mans Rullgard <mans@mansr.com>
----
- arch/arm/mm/alignment.c |    7 +++++++
- 1 files changed, 7 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
-index 6f98c35..1cda537 100644
---- a/arch/arm/mm/alignment.c
-+++ b/arch/arm/mm/alignment.c
-@@ -760,6 +760,13 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
- 
- 	ai_sys += 1;
- 
-+	printk("Alignment trap in kernel: %s (%d) PC=0x%08lx Instr=0x%0*lx "
-+	       "Address=0x%08lx FSR 0x%03x\n", current->comm,
-+	       task_pid_nr(current), instrptr,
-+	       thumb_mode(regs) ? 4 : 8,
-+	       thumb_mode(regs) ? tinstr : instr,
-+	       addr, fsr);
-+
-  fixup:
- 
- 	regs->ARM_pc += isize;
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4/0003-ARM-Expose-some-CPU-control-registers-via-sysfs.patch b/recipes/linux/linux-omap4/0003-ARM-Expose-some-CPU-control-registers-via-sysfs.patch
deleted file mode 100644
index 85bc9d151c..0000000000
--- a/recipes/linux/linux-omap4/0003-ARM-Expose-some-CPU-control-registers-via-sysfs.patch
+++ /dev/null
@@ -1,219 +0,0 @@
-From 9c2fe774ab6e2ec1897da02544818c9f8788005c Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Tue, 10 Nov 2009 00:39:21 +0000
-Subject: [PATCH 3/8] ARM: Expose some CPU control registers via sysfs
-
-This creates sysfs files under /sys/devices/system/cpu/cpuN
-exposing the values of the control register, auxiliary control
-register, L2 cache auxiliary control register, and PMON registers.
-Writing to the files allows setting the value of bits which are
-safe to change at any time.
-
-Signed-off-by: Mans Rullgard <mans@mansr.com>
----
- arch/arm/Kconfig           |    5 ++
- arch/arm/kernel/Makefile   |    1 +
- arch/arm/kernel/sysfs_v7.c |  163 ++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 169 insertions(+), 0 deletions(-)
- create mode 100644 arch/arm/kernel/sysfs_v7.c
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 4940c98..f7f8ddc 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1402,6 +1402,11 @@ config CC_STACKPROTECTOR
- 	  neutralized via a kernel panic.
- 	  This feature requires gcc version 4.2 or above.
- 
-+config CPU_V7_SYSFS
-+	bool
-+	depends on CPU_V7 && SYSFS
-+	default y
-+
- endmenu
- 
- menu "Boot options"
-diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
-index 26d302c..bbebeec 100644
---- a/arch/arm/kernel/Makefile
-+++ b/arch/arm/kernel/Makefile
-@@ -39,6 +39,7 @@ obj-$(CONFIG_ARM_THUMBEE)	+= thumbee.o
- obj-$(CONFIG_KGDB)		+= kgdb.o
- obj-$(CONFIG_ARM_UNWIND)	+= unwind.o
- obj-$(CONFIG_HAVE_TCM)		+= tcm.o
-+obj-$(CONFIG_CPU_V7_SYSFS)	+= sysfs_v7.o
- 
- obj-$(CONFIG_CRUNCH)		+= crunch.o crunch-bits.o
- AFLAGS_crunch-bits.o		:= -Wa,-mcpu=ep9312
-diff --git a/arch/arm/kernel/sysfs_v7.c b/arch/arm/kernel/sysfs_v7.c
-new file mode 100644
-index 0000000..0e492db
---- /dev/null
-+++ b/arch/arm/kernel/sysfs_v7.c
-@@ -0,0 +1,163 @@
-+/*
-+ *  linux/arch/arm/kernel/sysfs.c
-+ *
-+ *  Copyright (C) 2008 Mans Rullgard
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/cpu.h>
-+#include <linux/sysdev.h>
-+#include <linux/fs.h>
-+
-+#define SETBITS(val, bits, new)			\
-+	do {					\
-+		val &= ~bits;			\
-+		val |= new & bits;		\
-+	} while (0)
-+
-+#define SHOW_REG(name, opc1, crn, crm, opc2)				\
-+static ssize_t name##_show(struct sys_device *dev,			\
-+			   struct sysdev_attribute *attr,		\
-+			   char *buf)					\
-+{									\
-+	unsigned val;							\
-+	asm ("mrc p15,"#opc1", %0,"#crn","#crm","#opc2 : "=r"(val));	\
-+	return snprintf(buf, PAGE_SIZE, "%08x\n", val);			\
-+}
-+
-+#define STORE_REG(name, opc1, crn, crm, opc2, bits)			\
-+static ssize_t name##_store(struct sys_device *dev,			\
-+			    struct sysdev_attribute *attr,		\
-+			    const char *buf, size_t size)		\
-+{									\
-+	char *end;							\
-+	unsigned new = simple_strtoul(buf, &end, 0);			\
-+	unsigned val;							\
-+									\
-+	if (end == buf)							\
-+		return -EINVAL;						\
-+									\
-+	asm ("mrc p15,"#opc1", %0,"#crn","#crm","#opc2 : "=r"(val));	\
-+	SETBITS(val, bits, new);					\
-+	asm ("mcr p15,"#opc1", %0,"#crn","#crm","#opc2 :: "r"(val));	\
-+									\
-+	if (*end == '\n')						\
-+		end++;							\
-+	return end - buf;						\
-+}
-+
-+#define RD_REG(name, opc1, crn, crm, opc2)				\
-+	SHOW_REG(name, opc1, crn, crm, opc2)				\
-+	static SYSDEV_ATTR(name, S_IRUGO|S_IWUSR, name##_show, NULL)
-+
-+#define RDWR_REG(name, opc1, crn, crm, opc2, bits)			\
-+	SHOW_REG(name, opc1, crn, crm, opc2)				\
-+	STORE_REG(name, opc1, crn, crm, opc2, bits)			\
-+	static SYSDEV_ATTR(name, S_IRUGO|S_IWUSR, name##_show, name##_store)
-+
-+RDWR_REG(control, 0, c1, c0, 0, 0x802);
-+
-+SHOW_REG(aux_ctl, 0, c1, c0, 1)
-+
-+#ifdef CONFIG_ARCH_OMAP34XX
-+static ssize_t aux_ctl_store(struct sys_device *dev,
-+			     struct sysdev_attribute *attr,
-+			     const char *buf, size_t size)
-+{
-+	char *end;
-+	unsigned new = simple_strtoul(buf, &end, 0);
-+	unsigned val;
-+
-+	if (end == buf)
-+		return -EINVAL;
-+
-+	asm ("mrc p15, 0, %0, c1, c0, 1" : "=r"(val));
-+	SETBITS(val, 0xff8, new);
-+	val &= ~2;
-+	asm ("mov r0,  %0	\n\t"
-+	     "mov r12, #3	\n\t"
-+	     "smc #0		\n\t"
-+	     :: "r"(val) : "r0", "r12");
-+
-+	return end - buf;
-+}
-+#define AUX_WR S_IWUSR
-+#else
-+#define aux_ctl_store NULL
-+#define AUX_WR 0
-+#endif
-+
-+static SYSDEV_ATTR(aux_control, S_IRUGO|AUX_WR, aux_ctl_show, aux_ctl_store);
-+
-+SHOW_REG(l2_aux_ctl, 1, c9, c0, 2)
-+
-+#ifdef CONFIG_ARCH_OMAP34XX
-+static ssize_t l2_aux_ctl_store(struct sys_device *dev,
-+				struct sysdev_attribute *attr,
-+				const char *buf, size_t size)
-+{
-+	char *end;
-+	unsigned new = simple_strtoul(buf, &end, 0);
-+	unsigned val;
-+
-+	if (end == buf)
-+		return -EINVAL;
-+
-+	asm ("mrc p15, 1, %0, c9, c0, 2" : "=r"(val));
-+	SETBITS(val, 0xbc00000, new);
-+	asm ("mov r0,  %0	\n\t"
-+	     "mov r12, #2	\n\t"
-+	     "smc #0		\n\t"
-+	     :: "r"(val) : "r0", "r12");
-+
-+	return end - buf;
-+}
-+#define L2AUX_WR S_IWUSR
-+#else
-+#define l2_aux_ctl_store NULL
-+#define L2AUX_WR 0
-+#endif
-+
-+static SYSDEV_ATTR(l2_aux_control, S_IRUGO|L2AUX_WR,
-+		   l2_aux_ctl_show, l2_aux_ctl_store);
-+
-+RDWR_REG(pmon_pmnc,   0, c9, c12, 0, 0x3f)
-+RDWR_REG(pmon_cntens, 0, c9, c12, 1, 0xffffffff)
-+RDWR_REG(pmon_cntenc, 0, c9, c12, 2, 0xffffffff)
-+RDWR_REG(pmon_ccnt,   0, c9, c13, 0, 0xffffffff)
-+RDWR_REG(pmon_useren, 0, c9, c14, 0, 1)
-+RDWR_REG(pmon_intens, 0, c9, c14, 1, 0xffffffff)
-+RDWR_REG(pmon_intenc, 0, c9, c14, 2, 0xffffffff)
-+
-+#define REG_ATTR(sysdev, name)						\
-+	do {								\
-+		int err = sysfs_create_file(&sysdev->kobj, &name.attr); \
-+		WARN_ON(err != 0);					\
-+	} while (0)
-+
-+static int __init cpu_sysfs_init(void)
-+{
-+	struct sys_device *sysdev;
-+	int cpu;
-+
-+	for_each_possible_cpu(cpu) {
-+		sysdev = get_cpu_sysdev(cpu);
-+		REG_ATTR(sysdev, attr_control);
-+		REG_ATTR(sysdev, attr_aux_control);
-+		REG_ATTR(sysdev, attr_l2_aux_control);
-+		REG_ATTR(sysdev, attr_pmon_pmnc);
-+		REG_ATTR(sysdev, attr_pmon_cntens);
-+		REG_ATTR(sysdev, attr_pmon_cntenc);
-+		REG_ATTR(sysdev, attr_pmon_ccnt);
-+		REG_ATTR(sysdev, attr_pmon_useren);
-+		REG_ATTR(sysdev, attr_pmon_intens);
-+		REG_ATTR(sysdev, attr_pmon_intenc);
-+	}
-+
-+	return 0;
-+}
-+device_initcall(cpu_sysfs_init);
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4/0004-ARM-Add-option-to-allow-userspace-PLE-access.patch b/recipes/linux/linux-omap4/0004-ARM-Add-option-to-allow-userspace-PLE-access.patch
deleted file mode 100644
index c382814f9e..0000000000
--- a/recipes/linux/linux-omap4/0004-ARM-Add-option-to-allow-userspace-PLE-access.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From ad8b5670f25f8bf80b2a1646dafed4288c2e1574 Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Tue, 10 Nov 2009 00:41:54 +0000
-Subject: [PATCH 4/8] ARM: Add option to allow userspace PLE access
-
-This adds a Kconfig option to allow userspace to access the L2 preload
-engine (PLE) found in Cortex-A8 and A9.
-
-Signed-off-by: Mans Rullgard <mans@mansr.com>
----
- arch/arm/kernel/head.S |    4 ++++
- arch/arm/mm/Kconfig    |    8 ++++++++
- 2 files changed, 12 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
-index eb62bf9..659ec9e 100644
---- a/arch/arm/kernel/head.S
-+++ b/arch/arm/kernel/head.S
-@@ -172,6 +172,10 @@ __enable_mmu:
- #ifdef CONFIG_CPU_ICACHE_DISABLE
- 	bic	r0, r0, #CR_I
- #endif
-+#ifdef CONFIG_USER_L2_PLE
-+	mov	r5, #3
-+	mcr	p15, 0, r5, c11, c1, 0
-+#endif
- 	mov	r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
- 		      domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
- 		      domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
-diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
-index bad0d73..4a337ab 100644
---- a/arch/arm/mm/Kconfig
-+++ b/arch/arm/mm/Kconfig
-@@ -853,3 +853,11 @@ config ARCH_HAS_BARRIERS
- 	help
- 	  This option allows the use of custom mandatory barriers
- 	  included via the mach/barriers.h file.
-+
-+config USER_L2_PLE
-+	bool "Enable userspace access to the L2 PLE"
-+	depends on CPU_V7
-+	default n
-+	help
-+	  Enable userspace access to the L2 preload engine (PLE) available
-+	  in Cortex-A series ARM processors.
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4/0005-ARM-Add-option-to-allow-userspace-access-to-performa.patch b/recipes/linux/linux-omap4/0005-ARM-Add-option-to-allow-userspace-access-to-performa.patch
deleted file mode 100644
index 6835e0c0e1..0000000000
--- a/recipes/linux/linux-omap4/0005-ARM-Add-option-to-allow-userspace-access-to-performa.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 09a04a66c693a24e4e0423ac7add53a08f6c6a34 Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Tue, 10 Nov 2009 00:52:56 +0000
-Subject: [PATCH 5/8] ARM: Add option to allow userspace access to performance counters
-
-This adds an option to allow userspace access to the performance monitor
-registers of the Cortex-A8.
-
-Signed-off-by: Mans Rullgard <mans@mansr.com>
----
- arch/arm/mm/Kconfig   |    7 +++++++
- arch/arm/mm/proc-v7.S |    6 ++++++
- 2 files changed, 13 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
-index 4a337ab..a49ff8b 100644
---- a/arch/arm/mm/Kconfig
-+++ b/arch/arm/mm/Kconfig
-@@ -861,3 +861,10 @@ config USER_L2_PLE
- 	help
- 	  Enable userspace access to the L2 preload engine (PLE) available
- 	  in Cortex-A series ARM processors.
-+
-+config USER_PMON
-+	bool "Enable userspace access to performance counters"
-+	depends on CPU_V7
-+	default n
-+	help
-+	  Enable userpsace access to the performance monitor registers.
-diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
-index c1c3fe0..bd10c28 100644
---- a/arch/arm/mm/proc-v7.S
-+++ b/arch/arm/mm/proc-v7.S
-@@ -276,6 +276,12 @@ __v7_setup:
- 	mcr	p15, 0, r5, c10, c2, 0		@ write PRRR
- 	mcr	p15, 0, r6, c10, c2, 1		@ write NMRR
- #endif
-+
-+#ifdef CONFIG_USER_PMON
-+	mov	r0, #1
-+	mcr	p15, 0, r0, c9, c14, 0
-+#endif
-+
- 	adr	r5, v7_crval
- 	ldmia	r5, {r5, r6}
- #ifdef CONFIG_CPU_ENDIAN_BE8
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4/0006-OMAP4-do-not-force-select-options-which-are-not-requ.patch b/recipes/linux/linux-omap4/0006-OMAP4-do-not-force-select-options-which-are-not-requ.patch
deleted file mode 100644
index e0a19bb85e..0000000000
--- a/recipes/linux/linux-omap4/0006-OMAP4-do-not-force-select-options-which-are-not-requ.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From ce0ef43a81900899583d9b3578f79e82d7eccaf4 Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Sat, 30 Oct 2010 15:36:06 +0100
-Subject: [PATCH 6/8] OMAP4: do not force-select options which are not required
-
----
- arch/arm/plat-omap/Kconfig |    3 ---
- 1 files changed, 0 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
-index bead398..f0da7b2 100644
---- a/arch/arm/plat-omap/Kconfig
-+++ b/arch/arm/plat-omap/Kconfig
-@@ -39,9 +39,6 @@ config ARCH_OMAP4
- 	select CPU_V7
- 	select ARM_GIC
- 	select ARM_ERRATA_720789
--	select ARM_THUMB
--	select ARM_THUMBEE
--	select DEVTMPFS
- 	select UNIX
- 	select USB_ARCH_HAS_EHCI
- endchoice
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4/0007-omap4-enable-L2-prefetching.patch b/recipes/linux/linux-omap4/0007-omap4-enable-L2-prefetching.patch
deleted file mode 100644
index 9c69ae9baa..0000000000
--- a/recipes/linux/linux-omap4/0007-omap4-enable-L2-prefetching.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 4e7a9d05d31c0228f315656d730dfda205bd8530 Mon Sep 17 00:00:00 2001
-From: Mans Rullgard <mans@mansr.com>
-Date: Wed, 3 Nov 2010 19:52:52 +0000
-Subject: [PATCH 7/8] omap4: enable L2 prefetching
-
-Signed-off-by: Mans Rullgard <mans@mansr.com>
----
- arch/arm/mach-omap2/omap4-common.c |    5 ++++-
- 1 files changed, 4 insertions(+), 1 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
-index d01bf1a..0fedc6a 100644
---- a/arch/arm/mach-omap2/omap4-common.c
-+++ b/arch/arm/mach-omap2/omap4-common.c
-@@ -57,6 +57,9 @@ static int __init omap_l2_cache_init(void)
- 	l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
- 	BUG_ON(!l2cache_base);
- 
-+	if (omap_rev() == OMAP4430_REV_ES2_0)
-+		omap_smc1(0x109, 0x7e470000);
-+
- 	/* Enable PL310 L2 Cache controller */
- 	omap_smc1(0x102, 0x1);
- 
-@@ -65,7 +68,7 @@ static int __init omap_l2_cache_init(void)
- 	 * parity disabled
- 	 */
- 	if (omap_rev() == OMAP4430_REV_ES2_0)
--		l2x0_init(l2cache_base, 0x0e070000, 0xc0000fff);
-+		l2x0_init(l2cache_base, 0x7e470000, 0xc0000fff);
- 	else
- 		l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff);
- 
--- 
-1.6.6.1
-
diff --git a/recipes/linux/linux-omap4_2.6.35.3.bb b/recipes/linux/linux-omap4_2.6.35.3.bb
index 6b86002bab..b6f5cb337d 100644
--- a/recipes/linux/linux-omap4_2.6.35.3.bb
+++ b/recipes/linux/linux-omap4_2.6.35.3.bb
@@ -7,6 +7,13 @@ CORTEXA8FIXUP = "no"
 SRCREV = "35528f5b0481485654a6577306f7a80d9e6a5cf5"
 
 SRC_URI = "git://dev.omapzoom.org/pub/scm/integration/kernel-ubuntu.git;protocol=git;branch=ti-ubuntu-L24.11 \
+           file://0001-tiler-avoid-lock-ups-due-to-unmapped-DMM-entries.patch \
+           file://0002-ARM-Add-prompt-for-CONFIG_ALIGNMENT_TRAP.patch \
+           file://0003-ARM-Print-warning-on-alignment-trap-in-kernel-mode.patch \
+           file://0004-ARM-Expose-some-CPU-control-registers-via-sysfs.patch \
+           file://0005-ARM-Add-option-to-allow-userspace-PLE-access.patch \
+           file://0006-ARM-Add-option-to-allow-userspace-access-to-performa.patch \
+           file://0007-OMAP4-do-not-force-select-options-which-are-not-requ.patch \
            file://defconfig"
 
 S = "${WORKDIR}/git"