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authorFrans Meulenbroeks <fransmeulenbroeks@gmail.com>2010-10-11 22:06:59 +0200
committerFrans Meulenbroeks <fransmeulenbroeks@gmail.com>2010-10-11 22:38:48 +0200
commit27653bb9e3a9c45e89943aabad9f8e4a727e1929 (patch)
treedefe237f67465833b7f9149d1f0f818c93e0e6ed /recipes/obsolete/gcc
parente7f3fb184fed004326ce25a2abeae5b7117c9160 (diff)
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gcc : moved unused files to obsolete dir
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Diffstat (limited to 'recipes/obsolete/gcc')
-rw-r--r--recipes/obsolete/gcc/gcc-3.4.3/gcc-3.4.0-arm-softfloat.patch256
-rw-r--r--recipes/obsolete/gcc/gcc-3.4.3/gcc-uclibc-3.4.0-120-softfloat.patch14
-rw-r--r--recipes/obsolete/gcc/gcc-3.4.4/gcc-3.4.0-arm-softfloat.patch256
-rw-r--r--recipes/obsolete/gcc/gcc-3.4.4/gcc-uclibc-3.4.0-120-softfloat.patch14
-rw-r--r--recipes/obsolete/gcc/gcc-3.4.6/gcc-3.4.0-arm-softfloat.patch256
-rw-r--r--recipes/obsolete/gcc/gcc-3.4.6/gcc-uclibc-3.4.0-120-softfloat.patch14
-rw-r--r--recipes/obsolete/gcc/gcc-4.0.2/libstdc++-configure.patch10
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch85
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch169
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-and-or.patch67
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-dominance.patch12
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-eabi.patch64
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatsi-disable-single.patch38
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatunsidf.patch37
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-neg.patch30
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates.patch20
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates2.patch10
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-scc.patch38
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-truncsi-disable-new.patch33
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/901-avr32-no-cond-exec-before-reload-by-default.patch13
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch85
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-64bit-disable-4.2.0.patch169
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-and-or.patch67
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-dominance.patch12
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-eabi.patch64
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatsi-disable-single.patch38
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatunsidf.patch37
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-neg.patch30
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates.patch20
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates2.patch10
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-scc.patch38
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-truncsi-disable-new.patch33
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-32bit-disable.patch85
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch169
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-and-or.patch67
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-dominance.patch12
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-eabi.patch64
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch38
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatunsidf.patch37
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-neg.patch30
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates.patch20
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates2.patch10
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-scc.patch38
-rw-r--r--recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-truncsi-disable-new.patch33
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35440.patch56
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35751.patch114
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.1/gcc43-build-id.patch74
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.1/gcc43-ppc64-ia64-GNU-stack.patch86
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35440.patch56
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35751.patch114
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.2/gcc43-build-id.patch74
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.2/gcc43-ppc64-ia64-GNU-stack.patch86
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35440.patch56
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35751.patch114
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.3/gcc43-build-id.patch74
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.3/gcc43-ppc64-ia64-GNU-stack.patch86
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35440.patch56
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35751.patch114
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.4/gcc43-build-id.patch74
-rw-r--r--recipes/obsolete/gcc/gcc-4.3.4/gcc43-ppc64-ia64-GNU-stack.patch86
-rw-r--r--recipes/obsolete/gcc/gcc-4.4.4/gcc-arm-cp15-tpreg-for-TLS.patch217
-rw-r--r--recipes/obsolete/gcc/gcc-csl-arm-2008q3/gfortran-csl.patch40
-rw-r--r--recipes/obsolete/gcc/gcc-csl-arm/no-libfloat.patch11
-rw-r--r--recipes/obsolete/gcc/gcc-csl-arm/pic-without-sl.patch303
64 files changed, 4533 insertions, 0 deletions
diff --git a/recipes/obsolete/gcc/gcc-3.4.3/gcc-3.4.0-arm-softfloat.patch b/recipes/obsolete/gcc/gcc-3.4.3/gcc-3.4.0-arm-softfloat.patch
new file mode 100644
index 0000000000..f53d64b374
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-3.4.3/gcc-3.4.0-arm-softfloat.patch
@@ -0,0 +1,256 @@
+#
+# Submitted:
+#
+# Dimitry Andric <dimitry@andric.com>, 2004-05-01
+#
+# Description:
+#
+# Nicholas Pitre released this patch for gcc soft-float support here:
+# http://lists.arm.linux.org.uk/pipermail/linux-arm/2003-October/006436.html
+#
+# This version has been adapted to work with gcc 3.4.0.
+#
+# The original patch doesn't distinguish between softfpa and softvfp modes
+# in the way Nicholas Pitre probably meant. His description is:
+#
+# "Default is to use APCS-32 mode with soft-vfp. The old Linux default for
+# floats can be achieved with -mhard-float or with the configure
+# --with-float=hard option. If -msoft-float or --with-float=soft is used then
+# software float support will be used just like the default but with the legacy
+# big endian word ordering for double float representation instead."
+#
+# Which means the following:
+#
+# * If you compile without -mhard-float or -msoft-float, you should get
+# software floating point, using the VFP format. The produced object file
+# should have these flags in its header:
+#
+# private flags = 600: [APCS-32] [VFP float format] [software FP]
+#
+# * If you compile with -mhard-float, you should get hardware floating point,
+# which always uses the FPA format. Object file header flags should be:
+#
+# private flags = 0: [APCS-32] [FPA float format]
+#
+# * If you compile with -msoft-float, you should get software floating point,
+# using the FPA format. This is done for compatibility reasons with many
+# existing distributions. Object file header flags should be:
+#
+# private flags = 200: [APCS-32] [FPA float format] [software FP]
+#
+# The original patch from Nicholas Pitre contained the following constructs:
+#
+# #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+# %{mhard-float:-mfpu=fpa} \
+# %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
+#
+# However, gcc doesn't accept this ";:" notation, used in the 3rd line. This
+# is probably the reason Robert Schwebel modified it to:
+#
+# #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+# %{mhard-float:-mfpu=fpa} \
+# %{!mhard-float: %{msoft-float:-mfpu=softfpa -mfpu=softvfp}}"
+#
+# But this causes the following behaviour:
+#
+# * If you compile without -mhard-float or -msoft-float, the compiler generates
+# software floating point instructions, but *nothing* is passed to the
+# assembler, which results in an object file which has flags:
+#
+# private flags = 0: [APCS-32] [FPA float format]
+#
+# This is not correct!
+#
+# * If you compile with -mhard-float, the compiler generates hardware floating
+# point instructions, and passes "-mfpu=fpa" to the assembler, which results
+# in an object file which has the same flags as in the previous item, but now
+# those *are* correct.
+#
+# * If you compile with -msoft-float, the compiler generates software floating
+# point instructions, and passes "-mfpu=softfpa -mfpu=softvfp" (in that
+# order) to the assembler, which results in an object file with flags:
+#
+# private flags = 600: [APCS-32] [VFP float format] [software FP]
+#
+# This is not correct, because the last "-mfpu=" option on the assembler
+# command line determines the actual FPU convention used (which should be FPA
+# in this case).
+#
+# Therefore, I modified this patch to get the desired behaviour. Every
+# instance of the notation:
+#
+# %{msoft-float:-mfpu=softfpa -mfpu=softvfp}
+#
+# was changed to:
+#
+# %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}
+#
+# I also did the following:
+#
+# * Modified all TARGET_DEFAULT macros I could find to include ARM_FLAG_VFP, to
+# be consistent with Nicholas' original patch.
+# * Removed any "msoft-float" or "mhard-float" from all MULTILIB_DEFAULTS
+# macros I could find. I think that if you compile without any options, you
+# would like to get the defaults. :)
+# * Removed the extra -lfloat option from LIBGCC_SPEC, since it isn't needed
+# anymore. (The required functions are now in libgcc.)
+
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/coff.h gcc-3.4.0/gcc/config/arm/coff.h
+--- gcc-3.4.0-orig/gcc/config/arm/coff.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/coff.h 2004-05-01 19:07:06.059409600 +0200
+@@ -31,11 +31,16 @@
+ #define TARGET_VERSION fputs (" (ARM/coff)", stderr)
+
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
+ #endif
+
+ /* This is COFF, but prefer stabs. */
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/elf.h gcc-3.4.0/gcc/config/arm/elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/elf.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/elf.h 2004-05-01 19:12:16.976486400 +0200
+@@ -46,7 +46,9 @@
+
+ #ifndef SUBTARGET_ASM_FLOAT_SPEC
+ #define SUBTARGET_ASM_FLOAT_SPEC "\
+-%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa}"
++%{mapcs-float:-mfloat} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+ #endif
+
+ #ifndef ASM_SPEC
+@@ -106,12 +108,17 @@
+ #endif
+
+ #ifndef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+ #endif
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
+ #endif
+
+ #define TARGET_ASM_FILE_START_APP_OFF true
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/linux-elf.h gcc-3.4.0/gcc/config/arm/linux-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/linux-elf.h 2004-01-31 07:18:11.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/linux-elf.h 2004-05-01 19:19:06.935979200 +0200
+@@ -30,9 +30,27 @@
+ /* Do not assume anything about header files. */
+ #define NO_IMPLICIT_EXTERN_C
+
+-/* Default is to use APCS-32 mode. */
++/*
++ * Default is to use APCS-32 mode with soft-vfp.
++ * The old Linux default for floats can be achieved with -mhard-float
++ * or with the configure --with-float=hard option.
++ * If -msoft-float or --with-float=soft is used then software float
++ * support will be used just like the default but with the legacy
++ * big endian word ordering for double float representation instead.
++ */
++
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_APCS_32 \
++ | ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_MMU_TRAPS )
++
++#undef SUBTARGET_EXTRA_ASM_SPEC
++#define SUBTARGET_EXTRA_ASM_SPEC "\
++%{!mcpu=*:-mcpu=xscale} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
+@@ -40,7 +58,7 @@
+
+ #undef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
+
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+
+@@ -55,7 +73,7 @@
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/t-linux gcc-3.4.0/gcc/config/arm/t-linux
+--- gcc-3.4.0-orig/gcc/config/arm/t-linux 2003-09-20 23:09:07.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/t-linux 2004-05-01 20:31:59.102846400 +0200
+@@ -4,7 +4,10 @@
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
++LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/unknown-elf.h gcc-3.4.0/gcc/config/arm/unknown-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/unknown-elf.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/unknown-elf.h 2004-05-01 19:09:09.016212800 +0200
+@@ -30,7 +30,12 @@
+
+ /* Default to using APCS-32 and software floating point. */
+ #ifndef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+ #endif
+
+ /* Now we define the strings used to build the spec file. */
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/xscale-elf.h gcc-3.4.0/gcc/config/arm/xscale-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/xscale-elf.h 2003-07-02 01:26:43.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/xscale-elf.h 2004-05-01 20:15:36.620105600 +0200
+@@ -49,11 +49,12 @@
+ endian, regardless of the endian-ness of the memory
+ system. */
+
+-#define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+- %{mhard-float:-mfpu=fpa} \
+- %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
++#define SUBTARGET_EXTRA_ASM_SPEC "\
++%{!mcpu=*:-mcpu=xscale} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "mlittle-endian", "mno-thumb-interwork", "marm", "msoft-float" }
++ { "mlittle-endian", "mno-thumb-interwork", "marm" }
+ #endif
diff --git a/recipes/obsolete/gcc/gcc-3.4.3/gcc-uclibc-3.4.0-120-softfloat.patch b/recipes/obsolete/gcc/gcc-3.4.3/gcc-uclibc-3.4.0-120-softfloat.patch
new file mode 100644
index 0000000000..f2431896cf
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-3.4.3/gcc-uclibc-3.4.0-120-softfloat.patch
@@ -0,0 +1,14 @@
+--- gcc-3.3.2-old/configure.in 2003-08-09 01:57:21.000000000 -0500
++++ gcc-3.3.2/configure.in 2004-01-15 12:46:29.000000000 -0600
+@@ -1418,6 +1418,11 @@
+ fi
+
+ FLAGS_FOR_TARGET=
++case " $targargs " in
++ *" --nfp "* | *" --without-float "*)
++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -msoft-float'
++ ;;
++esac
+ case " $target_configdirs " in
+ *" newlib "*)
+ case " $targargs " in
diff --git a/recipes/obsolete/gcc/gcc-3.4.4/gcc-3.4.0-arm-softfloat.patch b/recipes/obsolete/gcc/gcc-3.4.4/gcc-3.4.0-arm-softfloat.patch
new file mode 100644
index 0000000000..f53d64b374
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-3.4.4/gcc-3.4.0-arm-softfloat.patch
@@ -0,0 +1,256 @@
+#
+# Submitted:
+#
+# Dimitry Andric <dimitry@andric.com>, 2004-05-01
+#
+# Description:
+#
+# Nicholas Pitre released this patch for gcc soft-float support here:
+# http://lists.arm.linux.org.uk/pipermail/linux-arm/2003-October/006436.html
+#
+# This version has been adapted to work with gcc 3.4.0.
+#
+# The original patch doesn't distinguish between softfpa and softvfp modes
+# in the way Nicholas Pitre probably meant. His description is:
+#
+# "Default is to use APCS-32 mode with soft-vfp. The old Linux default for
+# floats can be achieved with -mhard-float or with the configure
+# --with-float=hard option. If -msoft-float or --with-float=soft is used then
+# software float support will be used just like the default but with the legacy
+# big endian word ordering for double float representation instead."
+#
+# Which means the following:
+#
+# * If you compile without -mhard-float or -msoft-float, you should get
+# software floating point, using the VFP format. The produced object file
+# should have these flags in its header:
+#
+# private flags = 600: [APCS-32] [VFP float format] [software FP]
+#
+# * If you compile with -mhard-float, you should get hardware floating point,
+# which always uses the FPA format. Object file header flags should be:
+#
+# private flags = 0: [APCS-32] [FPA float format]
+#
+# * If you compile with -msoft-float, you should get software floating point,
+# using the FPA format. This is done for compatibility reasons with many
+# existing distributions. Object file header flags should be:
+#
+# private flags = 200: [APCS-32] [FPA float format] [software FP]
+#
+# The original patch from Nicholas Pitre contained the following constructs:
+#
+# #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+# %{mhard-float:-mfpu=fpa} \
+# %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
+#
+# However, gcc doesn't accept this ";:" notation, used in the 3rd line. This
+# is probably the reason Robert Schwebel modified it to:
+#
+# #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+# %{mhard-float:-mfpu=fpa} \
+# %{!mhard-float: %{msoft-float:-mfpu=softfpa -mfpu=softvfp}}"
+#
+# But this causes the following behaviour:
+#
+# * If you compile without -mhard-float or -msoft-float, the compiler generates
+# software floating point instructions, but *nothing* is passed to the
+# assembler, which results in an object file which has flags:
+#
+# private flags = 0: [APCS-32] [FPA float format]
+#
+# This is not correct!
+#
+# * If you compile with -mhard-float, the compiler generates hardware floating
+# point instructions, and passes "-mfpu=fpa" to the assembler, which results
+# in an object file which has the same flags as in the previous item, but now
+# those *are* correct.
+#
+# * If you compile with -msoft-float, the compiler generates software floating
+# point instructions, and passes "-mfpu=softfpa -mfpu=softvfp" (in that
+# order) to the assembler, which results in an object file with flags:
+#
+# private flags = 600: [APCS-32] [VFP float format] [software FP]
+#
+# This is not correct, because the last "-mfpu=" option on the assembler
+# command line determines the actual FPU convention used (which should be FPA
+# in this case).
+#
+# Therefore, I modified this patch to get the desired behaviour. Every
+# instance of the notation:
+#
+# %{msoft-float:-mfpu=softfpa -mfpu=softvfp}
+#
+# was changed to:
+#
+# %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}
+#
+# I also did the following:
+#
+# * Modified all TARGET_DEFAULT macros I could find to include ARM_FLAG_VFP, to
+# be consistent with Nicholas' original patch.
+# * Removed any "msoft-float" or "mhard-float" from all MULTILIB_DEFAULTS
+# macros I could find. I think that if you compile without any options, you
+# would like to get the defaults. :)
+# * Removed the extra -lfloat option from LIBGCC_SPEC, since it isn't needed
+# anymore. (The required functions are now in libgcc.)
+
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/coff.h gcc-3.4.0/gcc/config/arm/coff.h
+--- gcc-3.4.0-orig/gcc/config/arm/coff.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/coff.h 2004-05-01 19:07:06.059409600 +0200
+@@ -31,11 +31,16 @@
+ #define TARGET_VERSION fputs (" (ARM/coff)", stderr)
+
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
+ #endif
+
+ /* This is COFF, but prefer stabs. */
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/elf.h gcc-3.4.0/gcc/config/arm/elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/elf.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/elf.h 2004-05-01 19:12:16.976486400 +0200
+@@ -46,7 +46,9 @@
+
+ #ifndef SUBTARGET_ASM_FLOAT_SPEC
+ #define SUBTARGET_ASM_FLOAT_SPEC "\
+-%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa}"
++%{mapcs-float:-mfloat} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+ #endif
+
+ #ifndef ASM_SPEC
+@@ -106,12 +108,17 @@
+ #endif
+
+ #ifndef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+ #endif
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
+ #endif
+
+ #define TARGET_ASM_FILE_START_APP_OFF true
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/linux-elf.h gcc-3.4.0/gcc/config/arm/linux-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/linux-elf.h 2004-01-31 07:18:11.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/linux-elf.h 2004-05-01 19:19:06.935979200 +0200
+@@ -30,9 +30,27 @@
+ /* Do not assume anything about header files. */
+ #define NO_IMPLICIT_EXTERN_C
+
+-/* Default is to use APCS-32 mode. */
++/*
++ * Default is to use APCS-32 mode with soft-vfp.
++ * The old Linux default for floats can be achieved with -mhard-float
++ * or with the configure --with-float=hard option.
++ * If -msoft-float or --with-float=soft is used then software float
++ * support will be used just like the default but with the legacy
++ * big endian word ordering for double float representation instead.
++ */
++
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_APCS_32 \
++ | ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_MMU_TRAPS )
++
++#undef SUBTARGET_EXTRA_ASM_SPEC
++#define SUBTARGET_EXTRA_ASM_SPEC "\
++%{!mcpu=*:-mcpu=xscale} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
+@@ -40,7 +58,7 @@
+
+ #undef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
+
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+
+@@ -55,7 +73,7 @@
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/t-linux gcc-3.4.0/gcc/config/arm/t-linux
+--- gcc-3.4.0-orig/gcc/config/arm/t-linux 2003-09-20 23:09:07.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/t-linux 2004-05-01 20:31:59.102846400 +0200
+@@ -4,7 +4,10 @@
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
++LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/unknown-elf.h gcc-3.4.0/gcc/config/arm/unknown-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/unknown-elf.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/unknown-elf.h 2004-05-01 19:09:09.016212800 +0200
+@@ -30,7 +30,12 @@
+
+ /* Default to using APCS-32 and software floating point. */
+ #ifndef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+ #endif
+
+ /* Now we define the strings used to build the spec file. */
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/xscale-elf.h gcc-3.4.0/gcc/config/arm/xscale-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/xscale-elf.h 2003-07-02 01:26:43.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/xscale-elf.h 2004-05-01 20:15:36.620105600 +0200
+@@ -49,11 +49,12 @@
+ endian, regardless of the endian-ness of the memory
+ system. */
+
+-#define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+- %{mhard-float:-mfpu=fpa} \
+- %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
++#define SUBTARGET_EXTRA_ASM_SPEC "\
++%{!mcpu=*:-mcpu=xscale} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "mlittle-endian", "mno-thumb-interwork", "marm", "msoft-float" }
++ { "mlittle-endian", "mno-thumb-interwork", "marm" }
+ #endif
diff --git a/recipes/obsolete/gcc/gcc-3.4.4/gcc-uclibc-3.4.0-120-softfloat.patch b/recipes/obsolete/gcc/gcc-3.4.4/gcc-uclibc-3.4.0-120-softfloat.patch
new file mode 100644
index 0000000000..f2431896cf
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-3.4.4/gcc-uclibc-3.4.0-120-softfloat.patch
@@ -0,0 +1,14 @@
+--- gcc-3.3.2-old/configure.in 2003-08-09 01:57:21.000000000 -0500
++++ gcc-3.3.2/configure.in 2004-01-15 12:46:29.000000000 -0600
+@@ -1418,6 +1418,11 @@
+ fi
+
+ FLAGS_FOR_TARGET=
++case " $targargs " in
++ *" --nfp "* | *" --without-float "*)
++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -msoft-float'
++ ;;
++esac
+ case " $target_configdirs " in
+ *" newlib "*)
+ case " $targargs " in
diff --git a/recipes/obsolete/gcc/gcc-3.4.6/gcc-3.4.0-arm-softfloat.patch b/recipes/obsolete/gcc/gcc-3.4.6/gcc-3.4.0-arm-softfloat.patch
new file mode 100644
index 0000000000..f53d64b374
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-3.4.6/gcc-3.4.0-arm-softfloat.patch
@@ -0,0 +1,256 @@
+#
+# Submitted:
+#
+# Dimitry Andric <dimitry@andric.com>, 2004-05-01
+#
+# Description:
+#
+# Nicholas Pitre released this patch for gcc soft-float support here:
+# http://lists.arm.linux.org.uk/pipermail/linux-arm/2003-October/006436.html
+#
+# This version has been adapted to work with gcc 3.4.0.
+#
+# The original patch doesn't distinguish between softfpa and softvfp modes
+# in the way Nicholas Pitre probably meant. His description is:
+#
+# "Default is to use APCS-32 mode with soft-vfp. The old Linux default for
+# floats can be achieved with -mhard-float or with the configure
+# --with-float=hard option. If -msoft-float or --with-float=soft is used then
+# software float support will be used just like the default but with the legacy
+# big endian word ordering for double float representation instead."
+#
+# Which means the following:
+#
+# * If you compile without -mhard-float or -msoft-float, you should get
+# software floating point, using the VFP format. The produced object file
+# should have these flags in its header:
+#
+# private flags = 600: [APCS-32] [VFP float format] [software FP]
+#
+# * If you compile with -mhard-float, you should get hardware floating point,
+# which always uses the FPA format. Object file header flags should be:
+#
+# private flags = 0: [APCS-32] [FPA float format]
+#
+# * If you compile with -msoft-float, you should get software floating point,
+# using the FPA format. This is done for compatibility reasons with many
+# existing distributions. Object file header flags should be:
+#
+# private flags = 200: [APCS-32] [FPA float format] [software FP]
+#
+# The original patch from Nicholas Pitre contained the following constructs:
+#
+# #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+# %{mhard-float:-mfpu=fpa} \
+# %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
+#
+# However, gcc doesn't accept this ";:" notation, used in the 3rd line. This
+# is probably the reason Robert Schwebel modified it to:
+#
+# #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+# %{mhard-float:-mfpu=fpa} \
+# %{!mhard-float: %{msoft-float:-mfpu=softfpa -mfpu=softvfp}}"
+#
+# But this causes the following behaviour:
+#
+# * If you compile without -mhard-float or -msoft-float, the compiler generates
+# software floating point instructions, but *nothing* is passed to the
+# assembler, which results in an object file which has flags:
+#
+# private flags = 0: [APCS-32] [FPA float format]
+#
+# This is not correct!
+#
+# * If you compile with -mhard-float, the compiler generates hardware floating
+# point instructions, and passes "-mfpu=fpa" to the assembler, which results
+# in an object file which has the same flags as in the previous item, but now
+# those *are* correct.
+#
+# * If you compile with -msoft-float, the compiler generates software floating
+# point instructions, and passes "-mfpu=softfpa -mfpu=softvfp" (in that
+# order) to the assembler, which results in an object file with flags:
+#
+# private flags = 600: [APCS-32] [VFP float format] [software FP]
+#
+# This is not correct, because the last "-mfpu=" option on the assembler
+# command line determines the actual FPU convention used (which should be FPA
+# in this case).
+#
+# Therefore, I modified this patch to get the desired behaviour. Every
+# instance of the notation:
+#
+# %{msoft-float:-mfpu=softfpa -mfpu=softvfp}
+#
+# was changed to:
+#
+# %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}
+#
+# I also did the following:
+#
+# * Modified all TARGET_DEFAULT macros I could find to include ARM_FLAG_VFP, to
+# be consistent with Nicholas' original patch.
+# * Removed any "msoft-float" or "mhard-float" from all MULTILIB_DEFAULTS
+# macros I could find. I think that if you compile without any options, you
+# would like to get the defaults. :)
+# * Removed the extra -lfloat option from LIBGCC_SPEC, since it isn't needed
+# anymore. (The required functions are now in libgcc.)
+
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/coff.h gcc-3.4.0/gcc/config/arm/coff.h
+--- gcc-3.4.0-orig/gcc/config/arm/coff.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/coff.h 2004-05-01 19:07:06.059409600 +0200
+@@ -31,11 +31,16 @@
+ #define TARGET_VERSION fputs (" (ARM/coff)", stderr)
+
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
+ #endif
+
+ /* This is COFF, but prefer stabs. */
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/elf.h gcc-3.4.0/gcc/config/arm/elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/elf.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/elf.h 2004-05-01 19:12:16.976486400 +0200
+@@ -46,7 +46,9 @@
+
+ #ifndef SUBTARGET_ASM_FLOAT_SPEC
+ #define SUBTARGET_ASM_FLOAT_SPEC "\
+-%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa}"
++%{mapcs-float:-mfloat} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+ #endif
+
+ #ifndef ASM_SPEC
+@@ -106,12 +108,17 @@
+ #endif
+
+ #ifndef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+ #endif
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
+ #endif
+
+ #define TARGET_ASM_FILE_START_APP_OFF true
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/linux-elf.h gcc-3.4.0/gcc/config/arm/linux-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/linux-elf.h 2004-01-31 07:18:11.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/linux-elf.h 2004-05-01 19:19:06.935979200 +0200
+@@ -30,9 +30,27 @@
+ /* Do not assume anything about header files. */
+ #define NO_IMPLICIT_EXTERN_C
+
+-/* Default is to use APCS-32 mode. */
++/*
++ * Default is to use APCS-32 mode with soft-vfp.
++ * The old Linux default for floats can be achieved with -mhard-float
++ * or with the configure --with-float=hard option.
++ * If -msoft-float or --with-float=soft is used then software float
++ * support will be used just like the default but with the legacy
++ * big endian word ordering for double float representation instead.
++ */
++
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_APCS_32 \
++ | ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_MMU_TRAPS )
++
++#undef SUBTARGET_EXTRA_ASM_SPEC
++#define SUBTARGET_EXTRA_ASM_SPEC "\
++%{!mcpu=*:-mcpu=xscale} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
+@@ -40,7 +58,7 @@
+
+ #undef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
+
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+
+@@ -55,7 +73,7 @@
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/t-linux gcc-3.4.0/gcc/config/arm/t-linux
+--- gcc-3.4.0-orig/gcc/config/arm/t-linux 2003-09-20 23:09:07.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/t-linux 2004-05-01 20:31:59.102846400 +0200
+@@ -4,7 +4,10 @@
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
++LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/unknown-elf.h gcc-3.4.0/gcc/config/arm/unknown-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/unknown-elf.h 2004-02-24 15:25:22.000000000 +0100
++++ gcc-3.4.0/gcc/config/arm/unknown-elf.h 2004-05-01 19:09:09.016212800 +0200
+@@ -30,7 +30,12 @@
+
+ /* Default to using APCS-32 and software floating point. */
+ #ifndef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT \
++ ( ARM_FLAG_SOFT_FLOAT \
++ | ARM_FLAG_VFP \
++ | ARM_FLAG_APCS_32 \
++ | ARM_FLAG_APCS_FRAME \
++ | ARM_FLAG_MMU_TRAPS )
+ #endif
+
+ /* Now we define the strings used to build the spec file. */
+diff -urNd gcc-3.4.0-orig/gcc/config/arm/xscale-elf.h gcc-3.4.0/gcc/config/arm/xscale-elf.h
+--- gcc-3.4.0-orig/gcc/config/arm/xscale-elf.h 2003-07-02 01:26:43.000000000 +0200
++++ gcc-3.4.0/gcc/config/arm/xscale-elf.h 2004-05-01 20:15:36.620105600 +0200
+@@ -49,11 +49,12 @@
+ endian, regardless of the endian-ness of the memory
+ system. */
+
+-#define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
+- %{mhard-float:-mfpu=fpa} \
+- %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
++#define SUBTARGET_EXTRA_ASM_SPEC "\
++%{!mcpu=*:-mcpu=xscale} \
++%{mhard-float:-mfpu=fpa} \
++%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
+
+ #ifndef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "mlittle-endian", "mno-thumb-interwork", "marm", "msoft-float" }
++ { "mlittle-endian", "mno-thumb-interwork", "marm" }
+ #endif
diff --git a/recipes/obsolete/gcc/gcc-3.4.6/gcc-uclibc-3.4.0-120-softfloat.patch b/recipes/obsolete/gcc/gcc-3.4.6/gcc-uclibc-3.4.0-120-softfloat.patch
new file mode 100644
index 0000000000..f2431896cf
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-3.4.6/gcc-uclibc-3.4.0-120-softfloat.patch
@@ -0,0 +1,14 @@
+--- gcc-3.3.2-old/configure.in 2003-08-09 01:57:21.000000000 -0500
++++ gcc-3.3.2/configure.in 2004-01-15 12:46:29.000000000 -0600
+@@ -1418,6 +1418,11 @@
+ fi
+
+ FLAGS_FOR_TARGET=
++case " $targargs " in
++ *" --nfp "* | *" --without-float "*)
++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -msoft-float'
++ ;;
++esac
+ case " $target_configdirs " in
+ *" newlib "*)
+ case " $targargs " in
diff --git a/recipes/obsolete/gcc/gcc-4.0.2/libstdc++-configure.patch b/recipes/obsolete/gcc/gcc-4.0.2/libstdc++-configure.patch
new file mode 100644
index 0000000000..8dc613104d
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.0.2/libstdc++-configure.patch
@@ -0,0 +1,10 @@
+--- /tmp/configure 2007-06-02 09:26:29.000000000 +0200
++++ gcc-4.0.2/libstdc++-v3/configure 2007-06-02 09:26:40.135215000 +0200
+@@ -101472,7 +101472,6 @@
+ _ACEOF
+
+ fi
+-done
+
+ fi
+
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch
new file mode 100644
index 0000000000..88eaee322d
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-32bit-disable.patch
@@ -0,0 +1,85 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -149,7 +149,7 @@
+ (match_operand:SI 1 "cirrus_fp_register" "0")
+ (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v")
+ (match_operand:SI 3 "cirrus_fp_register" "v"))))]
+- "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmsc32%?\\t%V0, %V2, %V3"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -305,7 +305,7 @@
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -315,7 +315,7 @@
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32d%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -339,7 +339,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+@@ -349,7 +349,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+--- gcc-4.1.2/gcc/config/arm/arm.md-trunc 2007-06-15 10:56:13.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:01:22.000000000 +1000
+@@ -3130,7 +3130,7 @@
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+@@ -3142,7 +3142,7 @@
+ (float:DF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsidf2 (operands[0], operands[1]));
+ DONE;
+@@ -3154,7 +3154,7 @@
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], SImode))
+ operands[0] = force_reg (SImode, operands[0]);
+@@ -3170,7 +3170,7 @@
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[1], DFmode))
+ operands[1] = force_reg (DFmode, operands[0]);
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch
new file mode 100644
index 0000000000..60b17852bd
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-64bit-disable-4.2.0.patch
@@ -0,0 +1,169 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -34,7 +34,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (plus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfadd64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -74,7 +74,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (minus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsub64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -124,7 +124,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (mult:DI (match_operand:DI 2 "cirrus_fp_register" "v")
+ (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmul64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_dmult")
+ (set_attr "cirrus" "normal")]
+@@ -206,7 +206,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "register_operand" "r")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfrshl64%?\\t%V1, %V0, %s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -215,7 +215,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -224,7 +224,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashiftrt:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #-%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -232,7 +232,7 @@
+ (define_insn "*cirrus_absdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (abs:DI (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfabs64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -238,11 +238,12 @@
+ )
+
+ ;; This doesn't really clobber ``cc''. Fixme: aldyh.
++;; maybe buggy?
+ (define_insn "*cirrus_negdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (neg:DI (match_operand:DI 1 "cirrus_fp_register" "v")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfneg64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -324,14 +324,14 @@
+ (define_insn "floatdisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64s%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+ (define_insn "floatdidf2"
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+@@ -376,7 +376,7 @@
+ (define_insn "*cirrus_arm_movdi"
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,o<>,v,r,v,m,v")
+ (match_operand:DI 1 "di_operand" "rIK,mi,r,r,v,mi,v,v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "*
+ {
+ switch (which_alternative)
+--- gcc-4.1.2/gcc/config/arm/arm.md-64 2007-06-15 11:37:42.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:40:45.000000000 +1000
+@@ -357,7 +357,7 @@
+ (clobber (reg:CC CC_REGNUM))])]
+ "TARGET_EITHER"
+ "
+- if (TARGET_HARD_FLOAT && TARGET_MAVERICK)
++ if (TARGET_HARD_FLOAT && TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], DImode))
+ operands[0] = force_reg (DImode, operands[0]);
+@@ -393,7 +393,7 @@
+ (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0")
+ (match_operand:DI 2 "s_register_operand" "r, 0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -421,7 +421,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -450,7 +450,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -838,7 +838,7 @@
+ if (TARGET_HARD_FLOAT && TARGET_MAVERICK
+ && TARGET_ARM
+ && cirrus_fp_register (operands[0], DImode)
+- && cirrus_fp_register (operands[1], DImode))
++ && cirrus_fp_register (operands[1], DImode) && 0)
+ {
+ emit_insn (gen_cirrus_subdi3 (operands[0], operands[1], operands[2]));
+ DONE;
+@@ -2599,7 +2599,7 @@
+ values to iwmmxt regs and back. */
+ FAIL;
+ }
+- else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
++ else if (!TARGET_REALLY_IWMMXT)
+ FAIL;
+ "
+ )
+@@ -4215,7 +4215,6 @@
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=l,l,l,l,>,l, m,*r")
+ (match_operand:DI 1 "general_operand" "l, I,J,>,l,mi,l,*r"))]
+ "TARGET_THUMB
+- && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
+ "*
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-and-or.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-and-or.patch
new file mode 100644
index 0000000000..24357d316e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-and-or.patch
@@ -0,0 +1,67 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-13 17:16:38.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-13 17:35:19.000000000 +1000
+@@ -8455,7 +8455,7 @@
+ (and:SI (match_operator:SI 1 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "") (const_int 0)])
+ (match_operand:SI 2 "s_register_operand" "r")))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1"
+ [(set_attr "conds" "use")
+ (set_attr "length" "8")]
+@@ -8466,7 +8466,7 @@
+ (ior:SI (match_operator:SI 2 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "") (const_int 0)])
+ (match_operand:SI 1 "s_register_operand" "0,?r")))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "@
+ orr%d2\\t%0, %1, #1
+ mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1"
+@@ -8734,7 +8734,8 @@
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_ARM
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_OR_Y)
+- != CCmode)"
++ != CCmode)
++ && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 7)
+@@ -8765,7 +8766,7 @@
+ (set (match_operand:SI 7 "s_register_operand" "=r")
+ (ior:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])
+ (match_op_dup 6 [(match_dup 4) (match_dup 5)])))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 0)
+@@ -8790,7 +8791,8 @@
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_ARM
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+- != CCmode)"
++ != CCmode)
++ && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+@@ -8823,7 +8825,7 @@
+ (set (match_operand:SI 7 "s_register_operand" "=r")
+ (and:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])
+ (match_op_dup 6 [(match_dup 4) (match_dup 5)])))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 0)
+@@ -8850,7 +8852,7 @@
+ [(match_operand:SI 4 "s_register_operand" "r,r,r")
+ (match_operand:SI 5 "arm_add_operand" "rIL,rIL,rIL")])))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM
++ "TARGET_ARM && !TARGET_MAVERICK
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+ == CCmode)"
+ "#"
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-dominance.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-dominance.patch
new file mode 100644
index 0000000000..517ca8d80e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-dominance.patch
@@ -0,0 +1,12 @@
+--- gcc-4.1.2/gcc/config/arm/arm.c-original 2007-06-13 11:50:10.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.c 2007-06-13 11:50:56.000000000 +1000
+@@ -6556,6 +6556,9 @@
+ enum rtx_code cond1, cond2;
+ int swapped = 0;
+
++ if (TARGET_MAVERICK) // Simple hack for MAVERICK
++ return CCmode;
++
+ /* Currently we will probably get the wrong result if the individual
+ comparisons are not simple. This also ensures that it is safe to
+ reverse a comparison if necessary. */
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-eabi.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-eabi.patch
new file mode 100644
index 0000000000..f8992ed499
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-eabi.patch
@@ -0,0 +1,64 @@
+--- /home/hwilliams/original/gcc-4.1.2/gcc/config/arm/t-linux-eabi 2005-10-10 11:04:31.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/t-linux-eabi 2007-05-15 13:53:05.000000000 +1000
+@@ -1,11 +1,21 @@
+ # These functions are included in shared libraries.
+ TARGET_LIBGCC2_CFLAGS = -fPIC
++TARGET_LIBGCC2_CFLAGS += -mcpu=ep9312 -mfpu=maverick
++LIBGCC2_DEBUG_CFLAGS = -g0
+
+ # We do not build a Thumb multilib for Linux because the definition of
+ # CLEAR_INSN_CACHE in linux-gas.h does not work in Thumb mode.
+ MULTILIB_OPTIONS =
+ MULTILIB_DIRNAMES =
+
++LIB1ASMSRC = arm/lib1funcs.asm
++LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi
++
++CRTSTUFF_T_CFLAGS += -mcpu=ep9312 -mfpu=maverick
++
+ # Use a version of div0 which raises SIGFPE.
+ LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx
+
+diff -ruN arm/elf.h gcc-3.4.3/gcc/config/arm/elf.h
+--- ../gcc-4.1.2-orig/gcc/config/arm/elf.h 2004-02-24 16:25:22.000000000 +0200
++++ gcc-4.1.2/gcc/config/arm/elf.h 2005-02-10 00:31:28.000000000 +0200
+@@ -46,7 +46,7 @@
+
+ #ifndef SUBTARGET_ASM_FLOAT_SPEC
+ #define SUBTARGET_ASM_FLOAT_SPEC "\
+-%{mapcs-float:-mfloat}"
++%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa} %{mcpu=ep9312:-mfpu=maverick}"
+ #endif
+
+ #ifndef ASM_SPEC
+diff -ruN t-linux gcc-4.1.2/gcc/config/arm/t-linux
+--- t-linux 2007-05-09 16:32:28.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/t-linux 2007-05-25 11:02:17.000000000 +1000
+@@ -1,19 +1,22 @@
+ # Just for these, we omit the frame pointer since it makes such a big
+ # difference. It is then pointless adding debugging.
+ TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer -fPIC
++TARGET_LIBGCC2_CFLAGS += -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp -D__MAVERICK__
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+ LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
+ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
+ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
+- _call_via_rX \
+- _fixsfsi _fixunssfsi _floatdidf _floatdisf
++ _fixsfsi _fixunssfsi
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
+
+ # EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
+
++# EXTRA_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o
++CRTSTUFF_T_CFLAGS += -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp -D__MAVERICK__
++
+ # LIBGCC = stmp-multilib
+ # INSTALL_LIBGCC = install-multilib
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatsi-disable-single.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatsi-disable-single.patch
new file mode 100644
index 0000000000..cdd52244a6
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatsi-disable-single.patch
@@ -0,0 +1,38 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:12:39.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:16:13.000000000 +1000
+@@ -301,13 +301,14 @@
+ )
+
+ ;; Convert Cirrus-SI to Cirrus-SF
++; appears to be buggy
+ (define_insn "cirrus_floatsisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+ )
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:16:53.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:18:20.000000000 +1000
+@@ -3125,14 +3125,15 @@
+
+ ;; Fixed <--> Floating conversion insns
+
++;; Maverick Crunch floatsisf2 is buggy - see cirrus.md
+ (define_expand "floatsisf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+ }
+ ")
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatunsidf.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatunsidf.patch
new file mode 100644
index 0000000000..2fe2254db9
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-floatunsidf.patch
@@ -0,0 +1,37 @@
+--- gcc-4.1.2/gcc/config/arm/ieee754-df-original.S 2007-06-25 14:05:35.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/ieee754-df.S 2007-06-25 14:08:03.000000000 +1000
+@@ -382,6 +382,8 @@
+ FUNC_END aeabi_dadd
+ FUNC_END adddf3
+
++#ifndef __MAVERICK__ /* THIS IS A BAD HACK */
++
+ ARM_FUNC_START floatunsidf
+ ARM_FUNC_ALIAS aeabi_ui2d floatunsidf
+
+@@ -401,8 +403,14 @@
+ FUNC_END aeabi_ui2d
+ FUNC_END floatunsidf
+
++#endif
++
+ ARM_FUNC_START floatsidf
+ ARM_FUNC_ALIAS aeabi_i2d floatsidf
++#ifdef __MAVERICK__ /* THIS IS A BAD HACK */
++ARM_FUNC_ALIAS floatunsidf floatsidf
++ARM_FUNC_ALIAS aeabi_ui2d floatsidf
++#endif
+
+ teq r0, #0
+ moveq r1, #0
+@@ -418,6 +426,10 @@
+ mov xh, #0
+ b LSYM(Lad_l)
+
++#ifdef __MAVERICK__ /* THIS IS A BAD HACK */
++ FUNC_END aeabi_ui2d floatsidf
++ FUNC_END floatunsidf floatsidf
++#endif
+ FUNC_END aeabi_i2d
+ FUNC_END floatsidf
+
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-neg.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-neg.patch
new file mode 100644
index 0000000000..f14ae0190e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-neg.patch
@@ -0,0 +1,30 @@
+WARNING: adding this patch causes copysign1.c and mzero3.c to fail...
+diff -urN gcc-4.1.2/gcc/config/arm/arm.md-original gcc-4.1.2/gcc/config/arm/arm.md
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-12 12:48:14.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-12 12:49:53.000000000 +1000
+@@ -2985,14 +2985,14 @@
+ (define_expand "negsf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (neg:SF (match_operand:SF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ ""
+ )
+
+ (define_expand "negdf2"
+ [(set (match_operand:DF 0 "s_register_operand" "")
+ (neg:DF (match_operand:DF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "")
+
+ ;; abssi2 doesn't really clobber the condition codes if a different register
+@@ -4097,7 +4097,7 @@
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
+ (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))]
+ "TARGET_ARM
+- && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP))
++ && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP || TARGET_MAVERICK))
+ && !TARGET_IWMMXT"
+ "*
+ switch (which_alternative)
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates.patch
new file mode 100644
index 0000000000..4841ff8178
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates.patch
@@ -0,0 +1,20 @@
+diff -urN gcc-4.1.2/gcc/config/arm/predicates.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/predicates.md
+--- gcc-4.1.2/gcc/config/arm/predicates.md 2005-09-11 17:38:02.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/predicates.md 2007-05-30 12:15:54.000000000 +1000
+@@ -171,8 +171,14 @@
+ (match_code "eq,ne"))
+
+ ;; True for comparisons other than LTGT or UNEQ.
++(define_special_predicate "arm_comparison_operator"
++; (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt")) ;; original - no LTGT or UNEQ
++; (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltgt,ltu,unordered,ordered,uneq,unlt,unle,unge,ungt")) ;; everything?
++;; True for comparisons other than GE, GEU, UNLT, unordered or ordered. - Cirrus Version - must include ge?
+-(define_special_predicate "arm_comparison_operator"
++;(define_special_predicate "arm_comparison_operator"
+- (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt"))
++(match_code "eq,ne,le,lt,ge,geu,gt,gtu,leu,ltgt,ltu,uneq,unle,unge,ungt")) ;; bad codes removed?
++;(match_code "eq,ne,le,lt,gt,gtu,leu,ltgt,ltu,uneq,unle,unge,ungt")) ;; bad codes removed + ge / geu removed
++
+
+ (define_special_predicate "minmax_operator"
+ (and (match_code "smin,smax,umin,umax")
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates2.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates2.patch
new file mode 100644
index 0000000000..3e01158fe1
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-predicates2.patch
@@ -0,0 +1,10 @@
+--- gcc-4.1.2/gcc/config/arm/predicates.md-original 2007-06-13 12:25:35.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/predicates.md 2007-06-13 12:25:42.000000000 +1000
+@@ -206,7 +206,6 @@
+ || mode == CC_DEQmode
+ || mode == CC_DLEmode
+ || mode == CC_DLTmode
+- || mode == CC_DGEmode
+ || mode == CC_DGTmode
+ || mode == CC_DLEUmode
+ || mode == CC_DLTUmode
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-scc.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-scc.patch
new file mode 100644
index 0000000000..d1330f2543
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-scc.patch
@@ -0,0 +1,38 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-13 12:38:06.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-13 12:40:07.000000000 +1000
+@@ -7375,7 +7375,7 @@
+ (define_expand "sge"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ge:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
+ )
+
+@@ -7434,7 +7434,7 @@
+ (define_expand "sunordered"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (unordered:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+@@ -7442,7 +7442,7 @@
+ (define_expand "sordered"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ordered:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+@@ -7467,7 +7467,7 @@
+ (define_expand "sunlt"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (unlt:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
+ arm_compare_op1);"
+ )
diff --git a/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-truncsi-disable-new.patch b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-truncsi-disable-new.patch
new file mode 100644
index 0000000000..6dea43fa7c
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.1/arm-crunch-truncsi-disable-new.patch
@@ -0,0 +1,33 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:46:22.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:46:41.000000000 +1000
+@@ -337,13 +337,14 @@
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
++; appears to be buggy
+ (define_insn "cirrus_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+ )
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:46:56.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:48:08.000000000 +1000
+@@ -3151,10 +3151,11 @@
+ }
+ ")
+
++; appears to be buggy for MAVERICK
+ (define_expand "fix_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "
+ if (TARGET_MAVERICK)
+ {
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/901-avr32-no-cond-exec-before-reload-by-default.patch b/recipes/obsolete/gcc/gcc-4.2.2/901-avr32-no-cond-exec-before-reload-by-default.patch
new file mode 100644
index 0000000000..ab55ea4da1
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/901-avr32-no-cond-exec-before-reload-by-default.patch
@@ -0,0 +1,13 @@
+Index: gcc-4.2.2/gcc/config/avr32/avr32.c
+===================================================================
+--- gcc-4.2.2.orig/gcc/config/avr32/avr32.c 2008-04-08 10:42:47.000000000 +0200
++++ gcc-4.2.2/gcc/config/avr32/avr32.c 2008-04-08 10:43:33.000000000 +0200
+@@ -161,7 +161,7 @@
+ /* Set default target_flags. */
+ #undef TARGET_DEFAULT_TARGET_FLAGS
+ #define TARGET_DEFAULT_TARGET_FLAGS \
+- (MASK_HAS_ASM_ADDR_PSEUDOS | MASK_MD_REORG_OPTIMIZATION | MASK_COND_EXEC_BEFORE_RELOAD)
++ (MASK_HAS_ASM_ADDR_PSEUDOS | MASK_MD_REORG_OPTIMIZATION)
+
+ void
+ avr32_optimization_options (int level,
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch
new file mode 100644
index 0000000000..88eaee322d
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch
@@ -0,0 +1,85 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -149,7 +149,7 @@
+ (match_operand:SI 1 "cirrus_fp_register" "0")
+ (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v")
+ (match_operand:SI 3 "cirrus_fp_register" "v"))))]
+- "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmsc32%?\\t%V0, %V2, %V3"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -305,7 +305,7 @@
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -315,7 +315,7 @@
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32d%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -339,7 +339,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+@@ -349,7 +349,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+--- gcc-4.1.2/gcc/config/arm/arm.md-trunc 2007-06-15 10:56:13.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:01:22.000000000 +1000
+@@ -3130,7 +3130,7 @@
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+@@ -3142,7 +3142,7 @@
+ (float:DF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsidf2 (operands[0], operands[1]));
+ DONE;
+@@ -3154,7 +3154,7 @@
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], SImode))
+ operands[0] = force_reg (SImode, operands[0]);
+@@ -3170,7 +3170,7 @@
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[1], DFmode))
+ operands[1] = force_reg (DFmode, operands[0]);
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-64bit-disable-4.2.0.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-64bit-disable-4.2.0.patch
new file mode 100644
index 0000000000..60b17852bd
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-64bit-disable-4.2.0.patch
@@ -0,0 +1,169 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -34,7 +34,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (plus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfadd64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -74,7 +74,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (minus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsub64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -124,7 +124,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (mult:DI (match_operand:DI 2 "cirrus_fp_register" "v")
+ (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmul64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_dmult")
+ (set_attr "cirrus" "normal")]
+@@ -206,7 +206,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "register_operand" "r")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfrshl64%?\\t%V1, %V0, %s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -215,7 +215,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -224,7 +224,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashiftrt:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #-%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -232,7 +232,7 @@
+ (define_insn "*cirrus_absdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (abs:DI (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfabs64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -238,11 +238,12 @@
+ )
+
+ ;; This doesn't really clobber ``cc''. Fixme: aldyh.
++;; maybe buggy?
+ (define_insn "*cirrus_negdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (neg:DI (match_operand:DI 1 "cirrus_fp_register" "v")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfneg64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -324,14 +324,14 @@
+ (define_insn "floatdisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64s%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+ (define_insn "floatdidf2"
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+@@ -376,7 +376,7 @@
+ (define_insn "*cirrus_arm_movdi"
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,o<>,v,r,v,m,v")
+ (match_operand:DI 1 "di_operand" "rIK,mi,r,r,v,mi,v,v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "*
+ {
+ switch (which_alternative)
+--- gcc-4.1.2/gcc/config/arm/arm.md-64 2007-06-15 11:37:42.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:40:45.000000000 +1000
+@@ -357,7 +357,7 @@
+ (clobber (reg:CC CC_REGNUM))])]
+ "TARGET_EITHER"
+ "
+- if (TARGET_HARD_FLOAT && TARGET_MAVERICK)
++ if (TARGET_HARD_FLOAT && TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], DImode))
+ operands[0] = force_reg (DImode, operands[0]);
+@@ -393,7 +393,7 @@
+ (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0")
+ (match_operand:DI 2 "s_register_operand" "r, 0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -421,7 +421,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -450,7 +450,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -838,7 +838,7 @@
+ if (TARGET_HARD_FLOAT && TARGET_MAVERICK
+ && TARGET_ARM
+ && cirrus_fp_register (operands[0], DImode)
+- && cirrus_fp_register (operands[1], DImode))
++ && cirrus_fp_register (operands[1], DImode) && 0)
+ {
+ emit_insn (gen_cirrus_subdi3 (operands[0], operands[1], operands[2]));
+ DONE;
+@@ -2599,7 +2599,7 @@
+ values to iwmmxt regs and back. */
+ FAIL;
+ }
+- else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
++ else if (!TARGET_REALLY_IWMMXT)
+ FAIL;
+ "
+ )
+@@ -4215,7 +4215,6 @@
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=l,l,l,l,>,l, m,*r")
+ (match_operand:DI 1 "general_operand" "l, I,J,>,l,mi,l,*r"))]
+ "TARGET_THUMB
+- && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
+ "*
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-and-or.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-and-or.patch
new file mode 100644
index 0000000000..24357d316e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-and-or.patch
@@ -0,0 +1,67 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-13 17:16:38.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-13 17:35:19.000000000 +1000
+@@ -8455,7 +8455,7 @@
+ (and:SI (match_operator:SI 1 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "") (const_int 0)])
+ (match_operand:SI 2 "s_register_operand" "r")))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1"
+ [(set_attr "conds" "use")
+ (set_attr "length" "8")]
+@@ -8466,7 +8466,7 @@
+ (ior:SI (match_operator:SI 2 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "") (const_int 0)])
+ (match_operand:SI 1 "s_register_operand" "0,?r")))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "@
+ orr%d2\\t%0, %1, #1
+ mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1"
+@@ -8734,7 +8734,8 @@
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_ARM
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_OR_Y)
+- != CCmode)"
++ != CCmode)
++ && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 7)
+@@ -8765,7 +8766,7 @@
+ (set (match_operand:SI 7 "s_register_operand" "=r")
+ (ior:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])
+ (match_op_dup 6 [(match_dup 4) (match_dup 5)])))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 0)
+@@ -8790,7 +8791,8 @@
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_ARM
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+- != CCmode)"
++ != CCmode)
++ && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+@@ -8823,7 +8825,7 @@
+ (set (match_operand:SI 7 "s_register_operand" "=r")
+ (and:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])
+ (match_op_dup 6 [(match_dup 4) (match_dup 5)])))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 0)
+@@ -8850,7 +8852,7 @@
+ [(match_operand:SI 4 "s_register_operand" "r,r,r")
+ (match_operand:SI 5 "arm_add_operand" "rIL,rIL,rIL")])))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM
++ "TARGET_ARM && !TARGET_MAVERICK
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+ == CCmode)"
+ "#"
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-dominance.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-dominance.patch
new file mode 100644
index 0000000000..517ca8d80e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-dominance.patch
@@ -0,0 +1,12 @@
+--- gcc-4.1.2/gcc/config/arm/arm.c-original 2007-06-13 11:50:10.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.c 2007-06-13 11:50:56.000000000 +1000
+@@ -6556,6 +6556,9 @@
+ enum rtx_code cond1, cond2;
+ int swapped = 0;
+
++ if (TARGET_MAVERICK) // Simple hack for MAVERICK
++ return CCmode;
++
+ /* Currently we will probably get the wrong result if the individual
+ comparisons are not simple. This also ensures that it is safe to
+ reverse a comparison if necessary. */
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-eabi.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-eabi.patch
new file mode 100644
index 0000000000..f8992ed499
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-eabi.patch
@@ -0,0 +1,64 @@
+--- /home/hwilliams/original/gcc-4.1.2/gcc/config/arm/t-linux-eabi 2005-10-10 11:04:31.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/t-linux-eabi 2007-05-15 13:53:05.000000000 +1000
+@@ -1,11 +1,21 @@
+ # These functions are included in shared libraries.
+ TARGET_LIBGCC2_CFLAGS = -fPIC
++TARGET_LIBGCC2_CFLAGS += -mcpu=ep9312 -mfpu=maverick
++LIBGCC2_DEBUG_CFLAGS = -g0
+
+ # We do not build a Thumb multilib for Linux because the definition of
+ # CLEAR_INSN_CACHE in linux-gas.h does not work in Thumb mode.
+ MULTILIB_OPTIONS =
+ MULTILIB_DIRNAMES =
+
++LIB1ASMSRC = arm/lib1funcs.asm
++LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi
++
++CRTSTUFF_T_CFLAGS += -mcpu=ep9312 -mfpu=maverick
++
+ # Use a version of div0 which raises SIGFPE.
+ LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx
+
+diff -ruN arm/elf.h gcc-3.4.3/gcc/config/arm/elf.h
+--- ../gcc-4.1.2-orig/gcc/config/arm/elf.h 2004-02-24 16:25:22.000000000 +0200
++++ gcc-4.1.2/gcc/config/arm/elf.h 2005-02-10 00:31:28.000000000 +0200
+@@ -46,7 +46,7 @@
+
+ #ifndef SUBTARGET_ASM_FLOAT_SPEC
+ #define SUBTARGET_ASM_FLOAT_SPEC "\
+-%{mapcs-float:-mfloat}"
++%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa} %{mcpu=ep9312:-mfpu=maverick}"
+ #endif
+
+ #ifndef ASM_SPEC
+diff -ruN t-linux gcc-4.1.2/gcc/config/arm/t-linux
+--- t-linux 2007-05-09 16:32:28.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/t-linux 2007-05-25 11:02:17.000000000 +1000
+@@ -1,19 +1,22 @@
+ # Just for these, we omit the frame pointer since it makes such a big
+ # difference. It is then pointless adding debugging.
+ TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer -fPIC
++TARGET_LIBGCC2_CFLAGS += -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp -D__MAVERICK__
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+ LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
+ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
+ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
+- _call_via_rX \
+- _fixsfsi _fixunssfsi _floatdidf _floatdisf
++ _fixsfsi _fixunssfsi
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
+
+ # EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
+
++# EXTRA_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o
++CRTSTUFF_T_CFLAGS += -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp -D__MAVERICK__
++
+ # LIBGCC = stmp-multilib
+ # INSTALL_LIBGCC = install-multilib
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatsi-disable-single.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatsi-disable-single.patch
new file mode 100644
index 0000000000..cdd52244a6
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatsi-disable-single.patch
@@ -0,0 +1,38 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:12:39.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:16:13.000000000 +1000
+@@ -301,13 +301,14 @@
+ )
+
+ ;; Convert Cirrus-SI to Cirrus-SF
++; appears to be buggy
+ (define_insn "cirrus_floatsisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+ )
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:16:53.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:18:20.000000000 +1000
+@@ -3125,14 +3125,15 @@
+
+ ;; Fixed <--> Floating conversion insns
+
++;; Maverick Crunch floatsisf2 is buggy - see cirrus.md
+ (define_expand "floatsisf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+ }
+ ")
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatunsidf.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatunsidf.patch
new file mode 100644
index 0000000000..2fe2254db9
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-floatunsidf.patch
@@ -0,0 +1,37 @@
+--- gcc-4.1.2/gcc/config/arm/ieee754-df-original.S 2007-06-25 14:05:35.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/ieee754-df.S 2007-06-25 14:08:03.000000000 +1000
+@@ -382,6 +382,8 @@
+ FUNC_END aeabi_dadd
+ FUNC_END adddf3
+
++#ifndef __MAVERICK__ /* THIS IS A BAD HACK */
++
+ ARM_FUNC_START floatunsidf
+ ARM_FUNC_ALIAS aeabi_ui2d floatunsidf
+
+@@ -401,8 +403,14 @@
+ FUNC_END aeabi_ui2d
+ FUNC_END floatunsidf
+
++#endif
++
+ ARM_FUNC_START floatsidf
+ ARM_FUNC_ALIAS aeabi_i2d floatsidf
++#ifdef __MAVERICK__ /* THIS IS A BAD HACK */
++ARM_FUNC_ALIAS floatunsidf floatsidf
++ARM_FUNC_ALIAS aeabi_ui2d floatsidf
++#endif
+
+ teq r0, #0
+ moveq r1, #0
+@@ -418,6 +426,10 @@
+ mov xh, #0
+ b LSYM(Lad_l)
+
++#ifdef __MAVERICK__ /* THIS IS A BAD HACK */
++ FUNC_END aeabi_ui2d floatsidf
++ FUNC_END floatunsidf floatsidf
++#endif
+ FUNC_END aeabi_i2d
+ FUNC_END floatsidf
+
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-neg.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-neg.patch
new file mode 100644
index 0000000000..f14ae0190e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-neg.patch
@@ -0,0 +1,30 @@
+WARNING: adding this patch causes copysign1.c and mzero3.c to fail...
+diff -urN gcc-4.1.2/gcc/config/arm/arm.md-original gcc-4.1.2/gcc/config/arm/arm.md
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-12 12:48:14.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-12 12:49:53.000000000 +1000
+@@ -2985,14 +2985,14 @@
+ (define_expand "negsf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (neg:SF (match_operand:SF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ ""
+ )
+
+ (define_expand "negdf2"
+ [(set (match_operand:DF 0 "s_register_operand" "")
+ (neg:DF (match_operand:DF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "")
+
+ ;; abssi2 doesn't really clobber the condition codes if a different register
+@@ -4097,7 +4097,7 @@
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
+ (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))]
+ "TARGET_ARM
+- && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP))
++ && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP || TARGET_MAVERICK))
+ && !TARGET_IWMMXT"
+ "*
+ switch (which_alternative)
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates.patch
new file mode 100644
index 0000000000..4841ff8178
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates.patch
@@ -0,0 +1,20 @@
+diff -urN gcc-4.1.2/gcc/config/arm/predicates.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/predicates.md
+--- gcc-4.1.2/gcc/config/arm/predicates.md 2005-09-11 17:38:02.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/predicates.md 2007-05-30 12:15:54.000000000 +1000
+@@ -171,8 +171,14 @@
+ (match_code "eq,ne"))
+
+ ;; True for comparisons other than LTGT or UNEQ.
++(define_special_predicate "arm_comparison_operator"
++; (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt")) ;; original - no LTGT or UNEQ
++; (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltgt,ltu,unordered,ordered,uneq,unlt,unle,unge,ungt")) ;; everything?
++;; True for comparisons other than GE, GEU, UNLT, unordered or ordered. - Cirrus Version - must include ge?
+-(define_special_predicate "arm_comparison_operator"
++;(define_special_predicate "arm_comparison_operator"
+- (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt"))
++(match_code "eq,ne,le,lt,ge,geu,gt,gtu,leu,ltgt,ltu,uneq,unle,unge,ungt")) ;; bad codes removed?
++;(match_code "eq,ne,le,lt,gt,gtu,leu,ltgt,ltu,uneq,unle,unge,ungt")) ;; bad codes removed + ge / geu removed
++
+
+ (define_special_predicate "minmax_operator"
+ (and (match_code "smin,smax,umin,umax")
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates2.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates2.patch
new file mode 100644
index 0000000000..3e01158fe1
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-predicates2.patch
@@ -0,0 +1,10 @@
+--- gcc-4.1.2/gcc/config/arm/predicates.md-original 2007-06-13 12:25:35.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/predicates.md 2007-06-13 12:25:42.000000000 +1000
+@@ -206,7 +206,6 @@
+ || mode == CC_DEQmode
+ || mode == CC_DLEmode
+ || mode == CC_DLTmode
+- || mode == CC_DGEmode
+ || mode == CC_DGTmode
+ || mode == CC_DLEUmode
+ || mode == CC_DLTUmode
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-scc.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-scc.patch
new file mode 100644
index 0000000000..d1330f2543
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-scc.patch
@@ -0,0 +1,38 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-13 12:38:06.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-13 12:40:07.000000000 +1000
+@@ -7375,7 +7375,7 @@
+ (define_expand "sge"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ge:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
+ )
+
+@@ -7434,7 +7434,7 @@
+ (define_expand "sunordered"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (unordered:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+@@ -7442,7 +7442,7 @@
+ (define_expand "sordered"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ordered:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+@@ -7467,7 +7467,7 @@
+ (define_expand "sunlt"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (unlt:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
+ arm_compare_op1);"
+ )
diff --git a/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-truncsi-disable-new.patch b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-truncsi-disable-new.patch
new file mode 100644
index 0000000000..6dea43fa7c
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.2/arm-crunch-truncsi-disable-new.patch
@@ -0,0 +1,33 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:46:22.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:46:41.000000000 +1000
+@@ -337,13 +337,14 @@
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
++; appears to be buggy
+ (define_insn "cirrus_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+ )
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:46:56.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:48:08.000000000 +1000
+@@ -3151,10 +3151,11 @@
+ }
+ ")
+
++; appears to be buggy for MAVERICK
+ (define_expand "fix_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "
+ if (TARGET_MAVERICK)
+ {
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-32bit-disable.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-32bit-disable.patch
new file mode 100644
index 0000000000..88eaee322d
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-32bit-disable.patch
@@ -0,0 +1,85 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -149,7 +149,7 @@
+ (match_operand:SI 1 "cirrus_fp_register" "0")
+ (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v")
+ (match_operand:SI 3 "cirrus_fp_register" "v"))))]
+- "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmsc32%?\\t%V0, %V2, %V3"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -305,7 +305,7 @@
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -315,7 +315,7 @@
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32d%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -339,7 +339,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+@@ -349,7 +349,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+--- gcc-4.1.2/gcc/config/arm/arm.md-trunc 2007-06-15 10:56:13.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:01:22.000000000 +1000
+@@ -3130,7 +3130,7 @@
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+@@ -3142,7 +3142,7 @@
+ (float:DF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsidf2 (operands[0], operands[1]));
+ DONE;
+@@ -3154,7 +3154,7 @@
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], SImode))
+ operands[0] = force_reg (SImode, operands[0]);
+@@ -3170,7 +3170,7 @@
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[1], DFmode))
+ operands[1] = force_reg (DFmode, operands[0]);
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch
new file mode 100644
index 0000000000..60b17852bd
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-64bit-disable-4.2.0.patch
@@ -0,0 +1,169 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -34,7 +34,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (plus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfadd64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -74,7 +74,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (minus:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:DI 2 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsub64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -124,7 +124,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (mult:DI (match_operand:DI 2 "cirrus_fp_register" "v")
+ (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmul64%?\\t%V0, %V1, %V2"
+ [(set_attr "type" "mav_dmult")
+ (set_attr "cirrus" "normal")]
+@@ -206,7 +206,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "register_operand" "r")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfrshl64%?\\t%V1, %V0, %s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -215,7 +215,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -224,7 +224,7 @@
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (ashiftrt:DI (match_operand:DI 1 "cirrus_fp_register" "v")
+ (match_operand:SI 2 "cirrus_shift_const" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfsh64%?\\t%V0, %V1, #-%s2"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -232,7 +232,7 @@
+ (define_insn "*cirrus_absdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (abs:DI (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfabs64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -238,11 +238,12 @@
+ )
+
+ ;; This doesn't really clobber ``cc''. Fixme: aldyh.
++;; maybe buggy?
+ (define_insn "*cirrus_negdi2"
+ [(set (match_operand:DI 0 "cirrus_fp_register" "=v")
+ (neg:DI (match_operand:DI 1 "cirrus_fp_register" "v")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfneg64%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+@@ -324,14 +324,14 @@
+ (define_insn "floatdisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64s%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+ (define_insn "floatdidf2"
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:DI 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
+@@ -376,7 +376,7 @@
+ (define_insn "*cirrus_arm_movdi"
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,o<>,v,r,v,m,v")
+ (match_operand:DI 1 "di_operand" "rIK,mi,r,r,v,mi,v,v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "*
+ {
+ switch (which_alternative)
+--- gcc-4.1.2/gcc/config/arm/arm.md-64 2007-06-15 11:37:42.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:40:45.000000000 +1000
+@@ -357,7 +357,7 @@
+ (clobber (reg:CC CC_REGNUM))])]
+ "TARGET_EITHER"
+ "
+- if (TARGET_HARD_FLOAT && TARGET_MAVERICK)
++ if (TARGET_HARD_FLOAT && TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], DImode))
+ operands[0] = force_reg (DImode, operands[0]);
+@@ -393,7 +393,7 @@
+ (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0")
+ (match_operand:DI 2 "s_register_operand" "r, 0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -421,7 +421,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -450,7 +450,7 @@
+ (match_operand:SI 2 "s_register_operand" "r,r"))
+ (match_operand:DI 1 "s_register_operand" "r,0")))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(parallel [(set (reg:CC_C CC_REGNUM)
+@@ -838,7 +838,7 @@
+ if (TARGET_HARD_FLOAT && TARGET_MAVERICK
+ && TARGET_ARM
+ && cirrus_fp_register (operands[0], DImode)
+- && cirrus_fp_register (operands[1], DImode))
++ && cirrus_fp_register (operands[1], DImode) && 0)
+ {
+ emit_insn (gen_cirrus_subdi3 (operands[0], operands[1], operands[2]));
+ DONE;
+@@ -2599,7 +2599,7 @@
+ values to iwmmxt regs and back. */
+ FAIL;
+ }
+- else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK))
++ else if (!TARGET_REALLY_IWMMXT)
+ FAIL;
+ "
+ )
+@@ -4215,7 +4215,6 @@
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=l,l,l,l,>,l, m,*r")
+ (match_operand:DI 1 "general_operand" "l, I,J,>,l,mi,l,*r"))]
+ "TARGET_THUMB
+- && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
+ "*
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-and-or.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-and-or.patch
new file mode 100644
index 0000000000..24357d316e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-and-or.patch
@@ -0,0 +1,67 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-13 17:16:38.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-13 17:35:19.000000000 +1000
+@@ -8455,7 +8455,7 @@
+ (and:SI (match_operator:SI 1 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "") (const_int 0)])
+ (match_operand:SI 2 "s_register_operand" "r")))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1"
+ [(set_attr "conds" "use")
+ (set_attr "length" "8")]
+@@ -8466,7 +8466,7 @@
+ (ior:SI (match_operator:SI 2 "arm_comparison_operator"
+ [(match_operand 3 "cc_register" "") (const_int 0)])
+ (match_operand:SI 1 "s_register_operand" "0,?r")))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "@
+ orr%d2\\t%0, %1, #1
+ mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1"
+@@ -8734,7 +8734,8 @@
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_ARM
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_OR_Y)
+- != CCmode)"
++ != CCmode)
++ && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 7)
+@@ -8765,7 +8766,7 @@
+ (set (match_operand:SI 7 "s_register_operand" "=r")
+ (ior:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])
+ (match_op_dup 6 [(match_dup 4) (match_dup 5)])))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 0)
+@@ -8790,7 +8791,8 @@
+ (clobber (reg:CC CC_REGNUM))]
+ "TARGET_ARM
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+- != CCmode)"
++ != CCmode)
++ && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+@@ -8823,7 +8825,7 @@
+ (set (match_operand:SI 7 "s_register_operand" "=r")
+ (and:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])
+ (match_op_dup 6 [(match_dup 4) (match_dup 5)])))]
+- "TARGET_ARM"
++ "TARGET_ARM && !TARGET_MAVERICK"
+ "#"
+ "TARGET_ARM && reload_completed"
+ [(set (match_dup 0)
+@@ -8850,7 +8852,7 @@
+ [(match_operand:SI 4 "s_register_operand" "r,r,r")
+ (match_operand:SI 5 "arm_add_operand" "rIL,rIL,rIL")])))
+ (clobber (reg:CC CC_REGNUM))]
+- "TARGET_ARM
++ "TARGET_ARM && !TARGET_MAVERICK
+ && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y)
+ == CCmode)"
+ "#"
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-dominance.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-dominance.patch
new file mode 100644
index 0000000000..517ca8d80e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-dominance.patch
@@ -0,0 +1,12 @@
+--- gcc-4.1.2/gcc/config/arm/arm.c-original 2007-06-13 11:50:10.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.c 2007-06-13 11:50:56.000000000 +1000
+@@ -6556,6 +6556,9 @@
+ enum rtx_code cond1, cond2;
+ int swapped = 0;
+
++ if (TARGET_MAVERICK) // Simple hack for MAVERICK
++ return CCmode;
++
+ /* Currently we will probably get the wrong result if the individual
+ comparisons are not simple. This also ensures that it is safe to
+ reverse a comparison if necessary. */
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-eabi.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-eabi.patch
new file mode 100644
index 0000000000..f8992ed499
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-eabi.patch
@@ -0,0 +1,64 @@
+--- /home/hwilliams/original/gcc-4.1.2/gcc/config/arm/t-linux-eabi 2005-10-10 11:04:31.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/t-linux-eabi 2007-05-15 13:53:05.000000000 +1000
+@@ -1,11 +1,21 @@
+ # These functions are included in shared libraries.
+ TARGET_LIBGCC2_CFLAGS = -fPIC
++TARGET_LIBGCC2_CFLAGS += -mcpu=ep9312 -mfpu=maverick
++LIBGCC2_DEBUG_CFLAGS = -g0
+
+ # We do not build a Thumb multilib for Linux because the definition of
+ # CLEAR_INSN_CACHE in linux-gas.h does not work in Thumb mode.
+ MULTILIB_OPTIONS =
+ MULTILIB_DIRNAMES =
+
++LIB1ASMSRC = arm/lib1funcs.asm
++LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++ _fixsfsi _fixunssfsi
++
++CRTSTUFF_T_CFLAGS += -mcpu=ep9312 -mfpu=maverick
++
+ # Use a version of div0 which raises SIGFPE.
+ LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx
+
+diff -ruN arm/elf.h gcc-3.4.3/gcc/config/arm/elf.h
+--- ../gcc-4.1.2-orig/gcc/config/arm/elf.h 2004-02-24 16:25:22.000000000 +0200
++++ gcc-4.1.2/gcc/config/arm/elf.h 2005-02-10 00:31:28.000000000 +0200
+@@ -46,7 +46,7 @@
+
+ #ifndef SUBTARGET_ASM_FLOAT_SPEC
+ #define SUBTARGET_ASM_FLOAT_SPEC "\
+-%{mapcs-float:-mfloat}"
++%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa} %{mcpu=ep9312:-mfpu=maverick}"
+ #endif
+
+ #ifndef ASM_SPEC
+diff -ruN t-linux gcc-4.1.2/gcc/config/arm/t-linux
+--- t-linux 2007-05-09 16:32:28.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/t-linux 2007-05-25 11:02:17.000000000 +1000
+@@ -1,19 +1,22 @@
+ # Just for these, we omit the frame pointer since it makes such a big
+ # difference. It is then pointless adding debugging.
+ TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer -fPIC
++TARGET_LIBGCC2_CFLAGS += -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp -D__MAVERICK__
+ LIBGCC2_DEBUG_CFLAGS = -g0
+
+ LIB1ASMSRC = arm/lib1funcs.asm
+ LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
+ _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
+ _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
+- _call_via_rX \
+- _fixsfsi _fixunssfsi _floatdidf _floatdisf
++ _fixsfsi _fixunssfsi
+
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
+
+ # EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
+
++# EXTRA_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o
++CRTSTUFF_T_CFLAGS += -mcpu=ep9312 -mfpu=maverick -mfloat-abi=softfp -D__MAVERICK__
++
+ # LIBGCC = stmp-multilib
+ # INSTALL_LIBGCC = install-multilib
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch
new file mode 100644
index 0000000000..cdd52244a6
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatsi-disable-single.patch
@@ -0,0 +1,38 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:12:39.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:16:13.000000000 +1000
+@@ -301,13 +301,14 @@
+ )
+
+ ;; Convert Cirrus-SI to Cirrus-SF
++; appears to be buggy
+ (define_insn "cirrus_floatsisf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+ )
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:16:53.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:18:20.000000000 +1000
+@@ -3125,14 +3125,15 @@
+
+ ;; Fixed <--> Floating conversion insns
+
++;; Maverick Crunch floatsisf2 is buggy - see cirrus.md
+ (define_expand "floatsisf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+ }
+ ")
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatunsidf.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatunsidf.patch
new file mode 100644
index 0000000000..2fe2254db9
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-floatunsidf.patch
@@ -0,0 +1,37 @@
+--- gcc-4.1.2/gcc/config/arm/ieee754-df-original.S 2007-06-25 14:05:35.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/ieee754-df.S 2007-06-25 14:08:03.000000000 +1000
+@@ -382,6 +382,8 @@
+ FUNC_END aeabi_dadd
+ FUNC_END adddf3
+
++#ifndef __MAVERICK__ /* THIS IS A BAD HACK */
++
+ ARM_FUNC_START floatunsidf
+ ARM_FUNC_ALIAS aeabi_ui2d floatunsidf
+
+@@ -401,8 +403,14 @@
+ FUNC_END aeabi_ui2d
+ FUNC_END floatunsidf
+
++#endif
++
+ ARM_FUNC_START floatsidf
+ ARM_FUNC_ALIAS aeabi_i2d floatsidf
++#ifdef __MAVERICK__ /* THIS IS A BAD HACK */
++ARM_FUNC_ALIAS floatunsidf floatsidf
++ARM_FUNC_ALIAS aeabi_ui2d floatsidf
++#endif
+
+ teq r0, #0
+ moveq r1, #0
+@@ -418,6 +426,10 @@
+ mov xh, #0
+ b LSYM(Lad_l)
+
++#ifdef __MAVERICK__ /* THIS IS A BAD HACK */
++ FUNC_END aeabi_ui2d floatsidf
++ FUNC_END floatunsidf floatsidf
++#endif
+ FUNC_END aeabi_i2d
+ FUNC_END floatsidf
+
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-neg.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-neg.patch
new file mode 100644
index 0000000000..f14ae0190e
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-neg.patch
@@ -0,0 +1,30 @@
+WARNING: adding this patch causes copysign1.c and mzero3.c to fail...
+diff -urN gcc-4.1.2/gcc/config/arm/arm.md-original gcc-4.1.2/gcc/config/arm/arm.md
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-12 12:48:14.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-12 12:49:53.000000000 +1000
+@@ -2985,14 +2985,14 @@
+ (define_expand "negsf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (neg:SF (match_operand:SF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ ""
+ )
+
+ (define_expand "negdf2"
+ [(set (match_operand:DF 0 "s_register_operand" "")
+ (neg:DF (match_operand:DF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "")
+
+ ;; abssi2 doesn't really clobber the condition codes if a different register
+@@ -4097,7 +4097,7 @@
+ [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
+ (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))]
+ "TARGET_ARM
+- && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP))
++ && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP || TARGET_MAVERICK))
+ && !TARGET_IWMMXT"
+ "*
+ switch (which_alternative)
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates.patch
new file mode 100644
index 0000000000..4841ff8178
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates.patch
@@ -0,0 +1,20 @@
+diff -urN gcc-4.1.2/gcc/config/arm/predicates.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/predicates.md
+--- gcc-4.1.2/gcc/config/arm/predicates.md 2005-09-11 17:38:02.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/predicates.md 2007-05-30 12:15:54.000000000 +1000
+@@ -171,8 +171,14 @@
+ (match_code "eq,ne"))
+
+ ;; True for comparisons other than LTGT or UNEQ.
++(define_special_predicate "arm_comparison_operator"
++; (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt")) ;; original - no LTGT or UNEQ
++; (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltgt,ltu,unordered,ordered,uneq,unlt,unle,unge,ungt")) ;; everything?
++;; True for comparisons other than GE, GEU, UNLT, unordered or ordered. - Cirrus Version - must include ge?
+-(define_special_predicate "arm_comparison_operator"
++;(define_special_predicate "arm_comparison_operator"
+- (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt"))
++(match_code "eq,ne,le,lt,ge,geu,gt,gtu,leu,ltgt,ltu,uneq,unle,unge,ungt")) ;; bad codes removed?
++;(match_code "eq,ne,le,lt,gt,gtu,leu,ltgt,ltu,uneq,unle,unge,ungt")) ;; bad codes removed + ge / geu removed
++
+
+ (define_special_predicate "minmax_operator"
+ (and (match_code "smin,smax,umin,umax")
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates2.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates2.patch
new file mode 100644
index 0000000000..3e01158fe1
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-predicates2.patch
@@ -0,0 +1,10 @@
+--- gcc-4.1.2/gcc/config/arm/predicates.md-original 2007-06-13 12:25:35.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/predicates.md 2007-06-13 12:25:42.000000000 +1000
+@@ -206,7 +206,6 @@
+ || mode == CC_DEQmode
+ || mode == CC_DLEmode
+ || mode == CC_DLTmode
+- || mode == CC_DGEmode
+ || mode == CC_DGTmode
+ || mode == CC_DLEUmode
+ || mode == CC_DLTUmode
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-scc.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-scc.patch
new file mode 100644
index 0000000000..d1330f2543
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-scc.patch
@@ -0,0 +1,38 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-13 12:38:06.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-13 12:40:07.000000000 +1000
+@@ -7375,7 +7375,7 @@
+ (define_expand "sge"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ge:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++ "TARGET_ARM"
+ "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
+ )
+
+@@ -7434,7 +7434,7 @@
+ (define_expand "sunordered"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (unordered:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+@@ -7442,7 +7442,7 @@
+ (define_expand "sordered"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ordered:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+@@ -7467,7 +7467,7 @@
+ (define_expand "sunlt"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (unlt:SI (match_dup 1) (const_int 0)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
+ arm_compare_op1);"
+ )
diff --git a/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-truncsi-disable-new.patch b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-truncsi-disable-new.patch
new file mode 100644
index 0000000000..6dea43fa7c
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.2.3/arm-crunch-truncsi-disable-new.patch
@@ -0,0 +1,33 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:46:22.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:46:41.000000000 +1000
+@@ -337,13 +337,14 @@
+ "cfcvt64d%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")])
+
++; appears to be buggy
+ (define_insn "cirrus_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+ )
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:46:56.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:48:08.000000000 +1000
+@@ -3151,10 +3151,11 @@
+ }
+ ")
+
++; appears to be buggy for MAVERICK
+ (define_expand "fix_truncsfsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "
+ if (TARGET_MAVERICK)
+ {
diff --git a/recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35440.patch b/recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35440.patch
new file mode 100644
index 0000000000..6bf3f0d9d8
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35440.patch
@@ -0,0 +1,56 @@
+2008-03-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35440
+ * c-pretty-print.c (pp_c_initializer_list): Handle CONSTRUCTOR
+ for all types.
+
+ * gcc.dg/pr35440.c: New test.
+
+--- gcc/c-pretty-print.c.jj 2008-02-11 14:48:12.000000000 +0100
++++ gcc/c-pretty-print.c 2008-03-19 14:50:09.000000000 +0100
+@@ -1173,6 +1173,12 @@ pp_c_initializer_list (c_pretty_printer
+ tree type = TREE_TYPE (e);
+ const enum tree_code code = TREE_CODE (type);
+
++ if (TREE_CODE (e) == CONSTRUCTOR)
++ {
++ pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
++ return;
++ }
++
+ switch (code)
+ {
+ case RECORD_TYPE:
+@@ -1207,16 +1213,12 @@ pp_c_initializer_list (c_pretty_printer
+ case VECTOR_TYPE:
+ if (TREE_CODE (e) == VECTOR_CST)
+ pp_c_expression_list (pp, TREE_VECTOR_CST_ELTS (e));
+- else if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+ else
+ break;
+ return;
+
+ case COMPLEX_TYPE:
+- if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+- else if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
++ if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
+ {
+ const bool cst = TREE_CODE (e) == COMPLEX_CST;
+ pp_expression (pp, cst ? TREE_REALPART (e) : TREE_OPERAND (e, 0));
+--- gcc/testsuite/gcc.dg/pr35440.c.jj 2008-03-19 15:57:13.000000000 +0100
++++ gcc/testsuite/gcc.dg/pr35440.c 2008-03-19 15:47:35.000000000 +0100
+@@ -0,0 +1,12 @@
++/* PR c/35440 */
++/* { dg-do compile } */
++/* { dg-options "-std=gnu99" } */
++
++struct A {};
++struct B { int i; char j[2]; };
++
++void foo (void)
++{
++ (struct A){}(); /* { dg-error "called object" } */
++ (struct B){ .i = 2, .j[1] = 1 }(); /* { dg-error "called object" } */
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35751.patch b/recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35751.patch
new file mode 100644
index 0000000000..37b84275e2
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.1/fedora/gcc43-pr35751.patch
@@ -0,0 +1,114 @@
+2008-04-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35751
+ * c-decl.c (finish_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * decl.c (layout_var_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * gcc.dg/gomp/pr35751.c: New test.
+ * g++.dg/gomp/pr35751.C: New test.
+
+--- gcc/c-decl.c.jj 2008-04-03 09:41:42.000000000 +0200
++++ gcc/c-decl.c 2008-04-03 18:20:52.000000000 +0200
+@@ -3481,7 +3481,10 @@ finish_decl (tree decl, tree init, tree
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %q+D isn%'t constant", decl);
++ {
++ error ("storage size of %q+D isn%'t constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+
+ if (TREE_USED (type))
+--- gcc/cp/decl.c.jj 2008-03-31 23:54:40.000000000 +0200
++++ gcc/cp/decl.c 2008-04-03 18:30:19.000000000 +0200
+@@ -4442,7 +4442,10 @@ layout_var_decl (tree decl)
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %qD isn't constant", decl);
++ {
++ error ("storage size of %qD isn't constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+ }
+
+--- gcc/testsuite/gcc.dg/gomp/pr35751.c.jj 2008-04-03 18:26:12.000000000 +0200
++++ gcc/testsuite/gcc.dg/gomp/pr35751.c 2008-04-03 18:25:51.000000000 +0200
+@@ -0,0 +1,34 @@
++/* PR c/35751 */
++/* { dg-do compile } */
++/* { dg-options "-fopenmp" } */
++
++void
++foo (int i)
++{
++ extern int a[i]; /* { dg-error "must have no linkage|storage size of" } */
++ static int b[i]; /* { dg-error "storage size of" } */
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
+--- gcc/testsuite/g++.dg/gomp/pr35751.C.jj 2008-04-03 18:32:13.000000000 +0200
++++ gcc/testsuite/g++.dg/gomp/pr35751.C 2008-04-03 18:32:32.000000000 +0200
+@@ -0,0 +1,34 @@
++// PR c/35751
++// { dg-do compile }
++// { dg-options "-fopenmp" }
++
++void
++foo (int i)
++{
++ extern int a[i]; // { dg-error "storage size of" }
++ static int b[i]; // { dg-error "storage size of" }
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.1/gcc43-build-id.patch b/recipes/obsolete/gcc/gcc-4.3.1/gcc43-build-id.patch
new file mode 100644
index 0000000000..4e162e6472
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.1/gcc43-build-id.patch
@@ -0,0 +1,74 @@
+2007-07-22 Roland McGrath <roland@redhat.com>
+
+ * config/rs6000/sysv4.h (LINK_EH_SPEC): Add --build-id for
+ non-relocatable link.
+ * config/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux64.h (LINK_EH_SPEC): Likewise.
+ * config/alpha/elf.h (LINK_EH_SPEC): Likewise.
+ * config/ia64/linux.h (LINK_EH_SPEC): Likewise.
+
+--- gcc/config/rs6000/sysv4.h.~1~
++++ gcc/config/rs6000/sysv4.h
+@@ -1044,7 +1044,7 @@ extern int fixuplabelno;
+ %{!dynamic-linker:-dynamic-linker /lib/ld.so.1}}}"
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \
+--- gcc/config/linux.h.~1~
++++ gcc/config/linux.h
+@@ -85,7 +85,7 @@ Boston, MA 02110-1301, USA. */
+ } while (0)
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ /* Define this so we can compile MS code for use with WINE. */
+--- gcc/config/sparc/linux64.h.~1~
++++ gcc/config/sparc/linux64.h
+@@ -316,7 +316,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/sparc/linux.h.~1~
++++ gcc/config/sparc/linux.h
+@@ -188,7 +188,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/alpha/elf.h.~1~
++++ gcc/config/alpha/elf.h
+@@ -453,5 +453,5 @@ extern int alpha_this_gpdisp_sequence_nu
+ I imagine that other systems will catch up. In the meantime, it
+ doesn't harm to make sure that the data exists to be used later. */
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+--- gcc/config/ia64/linux.h.~1~
++++ gcc/config/ia64/linux.h
+@@ -56,7 +56,7 @@ do { \
+ Signalize that because we have fde-glibc, we don't need all C shared libs
+ linked against -lgcc_s. */
+ #undef LINK_EH_SPEC
+-#define LINK_EH_SPEC ""
++#define LINK_EH_SPEC "%{!r:--build-id} "
+
+ #define MD_UNWIND_SUPPORT "config/ia64/linux-unwind.h"
+
diff --git a/recipes/obsolete/gcc/gcc-4.3.1/gcc43-ppc64-ia64-GNU-stack.patch b/recipes/obsolete/gcc/gcc-4.3.1/gcc43-ppc64-ia64-GNU-stack.patch
new file mode 100644
index 0000000000..d49f2b9855
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.1/gcc43-ppc64-ia64-GNU-stack.patch
@@ -0,0 +1,86 @@
+2007-08-27 Jakub Jelinek <jakub@redhat.com>
+
+ * config/rs6000/rs6000.c (rs6000_elf_end_indicate_exec_stack): New.
+ * config/rs6000/linux64.h (TARGET_ASM_FILE_END): Use
+ rs6000_elf_end_indicate_exec_stack.
+ * config/ia64/ia64.c (ia64_linux_file_end): new.
+ * config/ia64/linux.h (TARGET_ASM_FILE_END): Use ia64_linux_file_end.
+
+--- gcc/config/rs6000/rs6000.c.jj 2007-12-07 18:41:08.000000000 +0100
++++ gcc/config/rs6000/rs6000.c 2007-12-07 18:42:12.000000000 +0100
+@@ -746,6 +746,7 @@ static void rs6000_file_start (void);
+ static int rs6000_elf_reloc_rw_mask (void);
+ static void rs6000_elf_asm_out_constructor (rtx, int);
+ static void rs6000_elf_asm_out_destructor (rtx, int);
++static void rs6000_elf_end_indicate_exec_stack (void) ATTRIBUTE_UNUSED;
+ static void rs6000_elf_asm_init_sections (void);
+ static section *rs6000_elf_select_rtx_section (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+@@ -20418,6 +20419,20 @@ rs6000_elf_declare_function_name (FILE *
+ }
+ ASM_OUTPUT_LABEL (file, name);
+ }
++
++static void
++rs6000_elf_end_indicate_exec_stack (void)
++{
++ if (TARGET_32BIT)
++ file_end_indicate_exec_stack ();
++ else
++ {
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++ }
++}
+ #endif
+
+ #if TARGET_XCOFF
+--- gcc/config/rs6000/linux64.h.jj 2007-12-07 17:18:06.000000000 +0100
++++ gcc/config/rs6000/linux64.h 2007-12-07 18:41:21.000000000 +0100
+@@ -504,7 +504,7 @@ extern int dot_symbols;
+ #undef DRAFT_V4_STRUCT_RET
+ #define DRAFT_V4_STRUCT_RET (!TARGET_64BIT)
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END rs6000_elf_end_indicate_exec_stack
+
+ #define TARGET_POSIX_IO
+
+--- gcc/config/ia64/linux.h.jj 2007-12-07 18:17:43.000000000 +0100
++++ gcc/config/ia64/linux.h 2007-12-07 18:41:21.000000000 +0100
+@@ -5,7 +5,7 @@
+
+ #define TARGET_VERSION fprintf (stderr, " (IA-64) Linux");
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END ia64_linux_file_end
+
+ /* This is for -profile to use -lc_p instead of -lc. */
+ #undef CC1_SPEC
+--- gcc/config/ia64/ia64.c.jj 2007-12-07 15:41:58.000000000 +0100
++++ gcc/config/ia64/ia64.c 2007-12-07 18:43:18.000000000 +0100
+@@ -262,6 +262,8 @@ static section *ia64_select_rtx_section
+ static void ia64_output_dwarf_dtprel (FILE *, int, rtx)
+ ATTRIBUTE_UNUSED;
+ static unsigned int ia64_section_type_flags (tree, const char *, int);
++static void ia64_linux_file_end (void)
++ ATTRIBUTE_UNUSED;
+ static void ia64_init_libfuncs (void)
+ ATTRIBUTE_UNUSED;
+ static void ia64_hpux_init_libfuncs (void)
+@@ -9957,4 +9959,13 @@ ia64_c_mode_for_suffix (char suffix)
+ return VOIDmode;
+ }
+
++static void
++ia64_linux_file_end (void)
++{
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++}
++
+ #include "gt-ia64.h"
diff --git a/recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35440.patch b/recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35440.patch
new file mode 100644
index 0000000000..6bf3f0d9d8
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35440.patch
@@ -0,0 +1,56 @@
+2008-03-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35440
+ * c-pretty-print.c (pp_c_initializer_list): Handle CONSTRUCTOR
+ for all types.
+
+ * gcc.dg/pr35440.c: New test.
+
+--- gcc/c-pretty-print.c.jj 2008-02-11 14:48:12.000000000 +0100
++++ gcc/c-pretty-print.c 2008-03-19 14:50:09.000000000 +0100
+@@ -1173,6 +1173,12 @@ pp_c_initializer_list (c_pretty_printer
+ tree type = TREE_TYPE (e);
+ const enum tree_code code = TREE_CODE (type);
+
++ if (TREE_CODE (e) == CONSTRUCTOR)
++ {
++ pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
++ return;
++ }
++
+ switch (code)
+ {
+ case RECORD_TYPE:
+@@ -1207,16 +1213,12 @@ pp_c_initializer_list (c_pretty_printer
+ case VECTOR_TYPE:
+ if (TREE_CODE (e) == VECTOR_CST)
+ pp_c_expression_list (pp, TREE_VECTOR_CST_ELTS (e));
+- else if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+ else
+ break;
+ return;
+
+ case COMPLEX_TYPE:
+- if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+- else if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
++ if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
+ {
+ const bool cst = TREE_CODE (e) == COMPLEX_CST;
+ pp_expression (pp, cst ? TREE_REALPART (e) : TREE_OPERAND (e, 0));
+--- gcc/testsuite/gcc.dg/pr35440.c.jj 2008-03-19 15:57:13.000000000 +0100
++++ gcc/testsuite/gcc.dg/pr35440.c 2008-03-19 15:47:35.000000000 +0100
+@@ -0,0 +1,12 @@
++/* PR c/35440 */
++/* { dg-do compile } */
++/* { dg-options "-std=gnu99" } */
++
++struct A {};
++struct B { int i; char j[2]; };
++
++void foo (void)
++{
++ (struct A){}(); /* { dg-error "called object" } */
++ (struct B){ .i = 2, .j[1] = 1 }(); /* { dg-error "called object" } */
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35751.patch b/recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35751.patch
new file mode 100644
index 0000000000..37b84275e2
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.2/fedora/gcc43-pr35751.patch
@@ -0,0 +1,114 @@
+2008-04-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35751
+ * c-decl.c (finish_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * decl.c (layout_var_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * gcc.dg/gomp/pr35751.c: New test.
+ * g++.dg/gomp/pr35751.C: New test.
+
+--- gcc/c-decl.c.jj 2008-04-03 09:41:42.000000000 +0200
++++ gcc/c-decl.c 2008-04-03 18:20:52.000000000 +0200
+@@ -3481,7 +3481,10 @@ finish_decl (tree decl, tree init, tree
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %q+D isn%'t constant", decl);
++ {
++ error ("storage size of %q+D isn%'t constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+
+ if (TREE_USED (type))
+--- gcc/cp/decl.c.jj 2008-03-31 23:54:40.000000000 +0200
++++ gcc/cp/decl.c 2008-04-03 18:30:19.000000000 +0200
+@@ -4442,7 +4442,10 @@ layout_var_decl (tree decl)
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %qD isn't constant", decl);
++ {
++ error ("storage size of %qD isn't constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+ }
+
+--- gcc/testsuite/gcc.dg/gomp/pr35751.c.jj 2008-04-03 18:26:12.000000000 +0200
++++ gcc/testsuite/gcc.dg/gomp/pr35751.c 2008-04-03 18:25:51.000000000 +0200
+@@ -0,0 +1,34 @@
++/* PR c/35751 */
++/* { dg-do compile } */
++/* { dg-options "-fopenmp" } */
++
++void
++foo (int i)
++{
++ extern int a[i]; /* { dg-error "must have no linkage|storage size of" } */
++ static int b[i]; /* { dg-error "storage size of" } */
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
+--- gcc/testsuite/g++.dg/gomp/pr35751.C.jj 2008-04-03 18:32:13.000000000 +0200
++++ gcc/testsuite/g++.dg/gomp/pr35751.C 2008-04-03 18:32:32.000000000 +0200
+@@ -0,0 +1,34 @@
++// PR c/35751
++// { dg-do compile }
++// { dg-options "-fopenmp" }
++
++void
++foo (int i)
++{
++ extern int a[i]; // { dg-error "storage size of" }
++ static int b[i]; // { dg-error "storage size of" }
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.2/gcc43-build-id.patch b/recipes/obsolete/gcc/gcc-4.3.2/gcc43-build-id.patch
new file mode 100644
index 0000000000..4e162e6472
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.2/gcc43-build-id.patch
@@ -0,0 +1,74 @@
+2007-07-22 Roland McGrath <roland@redhat.com>
+
+ * config/rs6000/sysv4.h (LINK_EH_SPEC): Add --build-id for
+ non-relocatable link.
+ * config/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux64.h (LINK_EH_SPEC): Likewise.
+ * config/alpha/elf.h (LINK_EH_SPEC): Likewise.
+ * config/ia64/linux.h (LINK_EH_SPEC): Likewise.
+
+--- gcc/config/rs6000/sysv4.h.~1~
++++ gcc/config/rs6000/sysv4.h
+@@ -1044,7 +1044,7 @@ extern int fixuplabelno;
+ %{!dynamic-linker:-dynamic-linker /lib/ld.so.1}}}"
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \
+--- gcc/config/linux.h.~1~
++++ gcc/config/linux.h
+@@ -85,7 +85,7 @@ Boston, MA 02110-1301, USA. */
+ } while (0)
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ /* Define this so we can compile MS code for use with WINE. */
+--- gcc/config/sparc/linux64.h.~1~
++++ gcc/config/sparc/linux64.h
+@@ -316,7 +316,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/sparc/linux.h.~1~
++++ gcc/config/sparc/linux.h
+@@ -188,7 +188,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/alpha/elf.h.~1~
++++ gcc/config/alpha/elf.h
+@@ -453,5 +453,5 @@ extern int alpha_this_gpdisp_sequence_nu
+ I imagine that other systems will catch up. In the meantime, it
+ doesn't harm to make sure that the data exists to be used later. */
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+--- gcc/config/ia64/linux.h.~1~
++++ gcc/config/ia64/linux.h
+@@ -56,7 +56,7 @@ do { \
+ Signalize that because we have fde-glibc, we don't need all C shared libs
+ linked against -lgcc_s. */
+ #undef LINK_EH_SPEC
+-#define LINK_EH_SPEC ""
++#define LINK_EH_SPEC "%{!r:--build-id} "
+
+ #define MD_UNWIND_SUPPORT "config/ia64/linux-unwind.h"
+
diff --git a/recipes/obsolete/gcc/gcc-4.3.2/gcc43-ppc64-ia64-GNU-stack.patch b/recipes/obsolete/gcc/gcc-4.3.2/gcc43-ppc64-ia64-GNU-stack.patch
new file mode 100644
index 0000000000..d49f2b9855
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.2/gcc43-ppc64-ia64-GNU-stack.patch
@@ -0,0 +1,86 @@
+2007-08-27 Jakub Jelinek <jakub@redhat.com>
+
+ * config/rs6000/rs6000.c (rs6000_elf_end_indicate_exec_stack): New.
+ * config/rs6000/linux64.h (TARGET_ASM_FILE_END): Use
+ rs6000_elf_end_indicate_exec_stack.
+ * config/ia64/ia64.c (ia64_linux_file_end): new.
+ * config/ia64/linux.h (TARGET_ASM_FILE_END): Use ia64_linux_file_end.
+
+--- gcc/config/rs6000/rs6000.c.jj 2007-12-07 18:41:08.000000000 +0100
++++ gcc/config/rs6000/rs6000.c 2007-12-07 18:42:12.000000000 +0100
+@@ -746,6 +746,7 @@ static void rs6000_file_start (void);
+ static int rs6000_elf_reloc_rw_mask (void);
+ static void rs6000_elf_asm_out_constructor (rtx, int);
+ static void rs6000_elf_asm_out_destructor (rtx, int);
++static void rs6000_elf_end_indicate_exec_stack (void) ATTRIBUTE_UNUSED;
+ static void rs6000_elf_asm_init_sections (void);
+ static section *rs6000_elf_select_rtx_section (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+@@ -20418,6 +20419,20 @@ rs6000_elf_declare_function_name (FILE *
+ }
+ ASM_OUTPUT_LABEL (file, name);
+ }
++
++static void
++rs6000_elf_end_indicate_exec_stack (void)
++{
++ if (TARGET_32BIT)
++ file_end_indicate_exec_stack ();
++ else
++ {
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++ }
++}
+ #endif
+
+ #if TARGET_XCOFF
+--- gcc/config/rs6000/linux64.h.jj 2007-12-07 17:18:06.000000000 +0100
++++ gcc/config/rs6000/linux64.h 2007-12-07 18:41:21.000000000 +0100
+@@ -504,7 +504,7 @@ extern int dot_symbols;
+ #undef DRAFT_V4_STRUCT_RET
+ #define DRAFT_V4_STRUCT_RET (!TARGET_64BIT)
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END rs6000_elf_end_indicate_exec_stack
+
+ #define TARGET_POSIX_IO
+
+--- gcc/config/ia64/linux.h.jj 2007-12-07 18:17:43.000000000 +0100
++++ gcc/config/ia64/linux.h 2007-12-07 18:41:21.000000000 +0100
+@@ -5,7 +5,7 @@
+
+ #define TARGET_VERSION fprintf (stderr, " (IA-64) Linux");
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END ia64_linux_file_end
+
+ /* This is for -profile to use -lc_p instead of -lc. */
+ #undef CC1_SPEC
+--- gcc/config/ia64/ia64.c.jj 2007-12-07 15:41:58.000000000 +0100
++++ gcc/config/ia64/ia64.c 2007-12-07 18:43:18.000000000 +0100
+@@ -262,6 +262,8 @@ static section *ia64_select_rtx_section
+ static void ia64_output_dwarf_dtprel (FILE *, int, rtx)
+ ATTRIBUTE_UNUSED;
+ static unsigned int ia64_section_type_flags (tree, const char *, int);
++static void ia64_linux_file_end (void)
++ ATTRIBUTE_UNUSED;
+ static void ia64_init_libfuncs (void)
+ ATTRIBUTE_UNUSED;
+ static void ia64_hpux_init_libfuncs (void)
+@@ -9957,4 +9959,13 @@ ia64_c_mode_for_suffix (char suffix)
+ return VOIDmode;
+ }
+
++static void
++ia64_linux_file_end (void)
++{
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++}
++
+ #include "gt-ia64.h"
diff --git a/recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35440.patch b/recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35440.patch
new file mode 100644
index 0000000000..6bf3f0d9d8
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35440.patch
@@ -0,0 +1,56 @@
+2008-03-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35440
+ * c-pretty-print.c (pp_c_initializer_list): Handle CONSTRUCTOR
+ for all types.
+
+ * gcc.dg/pr35440.c: New test.
+
+--- gcc/c-pretty-print.c.jj 2008-02-11 14:48:12.000000000 +0100
++++ gcc/c-pretty-print.c 2008-03-19 14:50:09.000000000 +0100
+@@ -1173,6 +1173,12 @@ pp_c_initializer_list (c_pretty_printer
+ tree type = TREE_TYPE (e);
+ const enum tree_code code = TREE_CODE (type);
+
++ if (TREE_CODE (e) == CONSTRUCTOR)
++ {
++ pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
++ return;
++ }
++
+ switch (code)
+ {
+ case RECORD_TYPE:
+@@ -1207,16 +1213,12 @@ pp_c_initializer_list (c_pretty_printer
+ case VECTOR_TYPE:
+ if (TREE_CODE (e) == VECTOR_CST)
+ pp_c_expression_list (pp, TREE_VECTOR_CST_ELTS (e));
+- else if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+ else
+ break;
+ return;
+
+ case COMPLEX_TYPE:
+- if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+- else if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
++ if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
+ {
+ const bool cst = TREE_CODE (e) == COMPLEX_CST;
+ pp_expression (pp, cst ? TREE_REALPART (e) : TREE_OPERAND (e, 0));
+--- gcc/testsuite/gcc.dg/pr35440.c.jj 2008-03-19 15:57:13.000000000 +0100
++++ gcc/testsuite/gcc.dg/pr35440.c 2008-03-19 15:47:35.000000000 +0100
+@@ -0,0 +1,12 @@
++/* PR c/35440 */
++/* { dg-do compile } */
++/* { dg-options "-std=gnu99" } */
++
++struct A {};
++struct B { int i; char j[2]; };
++
++void foo (void)
++{
++ (struct A){}(); /* { dg-error "called object" } */
++ (struct B){ .i = 2, .j[1] = 1 }(); /* { dg-error "called object" } */
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35751.patch b/recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35751.patch
new file mode 100644
index 0000000000..37b84275e2
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.3/fedora/gcc43-pr35751.patch
@@ -0,0 +1,114 @@
+2008-04-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35751
+ * c-decl.c (finish_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * decl.c (layout_var_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * gcc.dg/gomp/pr35751.c: New test.
+ * g++.dg/gomp/pr35751.C: New test.
+
+--- gcc/c-decl.c.jj 2008-04-03 09:41:42.000000000 +0200
++++ gcc/c-decl.c 2008-04-03 18:20:52.000000000 +0200
+@@ -3481,7 +3481,10 @@ finish_decl (tree decl, tree init, tree
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %q+D isn%'t constant", decl);
++ {
++ error ("storage size of %q+D isn%'t constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+
+ if (TREE_USED (type))
+--- gcc/cp/decl.c.jj 2008-03-31 23:54:40.000000000 +0200
++++ gcc/cp/decl.c 2008-04-03 18:30:19.000000000 +0200
+@@ -4442,7 +4442,10 @@ layout_var_decl (tree decl)
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %qD isn't constant", decl);
++ {
++ error ("storage size of %qD isn't constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+ }
+
+--- gcc/testsuite/gcc.dg/gomp/pr35751.c.jj 2008-04-03 18:26:12.000000000 +0200
++++ gcc/testsuite/gcc.dg/gomp/pr35751.c 2008-04-03 18:25:51.000000000 +0200
+@@ -0,0 +1,34 @@
++/* PR c/35751 */
++/* { dg-do compile } */
++/* { dg-options "-fopenmp" } */
++
++void
++foo (int i)
++{
++ extern int a[i]; /* { dg-error "must have no linkage|storage size of" } */
++ static int b[i]; /* { dg-error "storage size of" } */
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
+--- gcc/testsuite/g++.dg/gomp/pr35751.C.jj 2008-04-03 18:32:13.000000000 +0200
++++ gcc/testsuite/g++.dg/gomp/pr35751.C 2008-04-03 18:32:32.000000000 +0200
+@@ -0,0 +1,34 @@
++// PR c/35751
++// { dg-do compile }
++// { dg-options "-fopenmp" }
++
++void
++foo (int i)
++{
++ extern int a[i]; // { dg-error "storage size of" }
++ static int b[i]; // { dg-error "storage size of" }
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.3/gcc43-build-id.patch b/recipes/obsolete/gcc/gcc-4.3.3/gcc43-build-id.patch
new file mode 100644
index 0000000000..4e162e6472
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.3/gcc43-build-id.patch
@@ -0,0 +1,74 @@
+2007-07-22 Roland McGrath <roland@redhat.com>
+
+ * config/rs6000/sysv4.h (LINK_EH_SPEC): Add --build-id for
+ non-relocatable link.
+ * config/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux64.h (LINK_EH_SPEC): Likewise.
+ * config/alpha/elf.h (LINK_EH_SPEC): Likewise.
+ * config/ia64/linux.h (LINK_EH_SPEC): Likewise.
+
+--- gcc/config/rs6000/sysv4.h.~1~
++++ gcc/config/rs6000/sysv4.h
+@@ -1044,7 +1044,7 @@ extern int fixuplabelno;
+ %{!dynamic-linker:-dynamic-linker /lib/ld.so.1}}}"
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \
+--- gcc/config/linux.h.~1~
++++ gcc/config/linux.h
+@@ -85,7 +85,7 @@ Boston, MA 02110-1301, USA. */
+ } while (0)
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ /* Define this so we can compile MS code for use with WINE. */
+--- gcc/config/sparc/linux64.h.~1~
++++ gcc/config/sparc/linux64.h
+@@ -316,7 +316,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/sparc/linux.h.~1~
++++ gcc/config/sparc/linux.h
+@@ -188,7 +188,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/alpha/elf.h.~1~
++++ gcc/config/alpha/elf.h
+@@ -453,5 +453,5 @@ extern int alpha_this_gpdisp_sequence_nu
+ I imagine that other systems will catch up. In the meantime, it
+ doesn't harm to make sure that the data exists to be used later. */
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+--- gcc/config/ia64/linux.h.~1~
++++ gcc/config/ia64/linux.h
+@@ -56,7 +56,7 @@ do { \
+ Signalize that because we have fde-glibc, we don't need all C shared libs
+ linked against -lgcc_s. */
+ #undef LINK_EH_SPEC
+-#define LINK_EH_SPEC ""
++#define LINK_EH_SPEC "%{!r:--build-id} "
+
+ #define MD_UNWIND_SUPPORT "config/ia64/linux-unwind.h"
+
diff --git a/recipes/obsolete/gcc/gcc-4.3.3/gcc43-ppc64-ia64-GNU-stack.patch b/recipes/obsolete/gcc/gcc-4.3.3/gcc43-ppc64-ia64-GNU-stack.patch
new file mode 100644
index 0000000000..d49f2b9855
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.3/gcc43-ppc64-ia64-GNU-stack.patch
@@ -0,0 +1,86 @@
+2007-08-27 Jakub Jelinek <jakub@redhat.com>
+
+ * config/rs6000/rs6000.c (rs6000_elf_end_indicate_exec_stack): New.
+ * config/rs6000/linux64.h (TARGET_ASM_FILE_END): Use
+ rs6000_elf_end_indicate_exec_stack.
+ * config/ia64/ia64.c (ia64_linux_file_end): new.
+ * config/ia64/linux.h (TARGET_ASM_FILE_END): Use ia64_linux_file_end.
+
+--- gcc/config/rs6000/rs6000.c.jj 2007-12-07 18:41:08.000000000 +0100
++++ gcc/config/rs6000/rs6000.c 2007-12-07 18:42:12.000000000 +0100
+@@ -746,6 +746,7 @@ static void rs6000_file_start (void);
+ static int rs6000_elf_reloc_rw_mask (void);
+ static void rs6000_elf_asm_out_constructor (rtx, int);
+ static void rs6000_elf_asm_out_destructor (rtx, int);
++static void rs6000_elf_end_indicate_exec_stack (void) ATTRIBUTE_UNUSED;
+ static void rs6000_elf_asm_init_sections (void);
+ static section *rs6000_elf_select_rtx_section (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+@@ -20418,6 +20419,20 @@ rs6000_elf_declare_function_name (FILE *
+ }
+ ASM_OUTPUT_LABEL (file, name);
+ }
++
++static void
++rs6000_elf_end_indicate_exec_stack (void)
++{
++ if (TARGET_32BIT)
++ file_end_indicate_exec_stack ();
++ else
++ {
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++ }
++}
+ #endif
+
+ #if TARGET_XCOFF
+--- gcc/config/rs6000/linux64.h.jj 2007-12-07 17:18:06.000000000 +0100
++++ gcc/config/rs6000/linux64.h 2007-12-07 18:41:21.000000000 +0100
+@@ -504,7 +504,7 @@ extern int dot_symbols;
+ #undef DRAFT_V4_STRUCT_RET
+ #define DRAFT_V4_STRUCT_RET (!TARGET_64BIT)
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END rs6000_elf_end_indicate_exec_stack
+
+ #define TARGET_POSIX_IO
+
+--- gcc/config/ia64/linux.h.jj 2007-12-07 18:17:43.000000000 +0100
++++ gcc/config/ia64/linux.h 2007-12-07 18:41:21.000000000 +0100
+@@ -5,7 +5,7 @@
+
+ #define TARGET_VERSION fprintf (stderr, " (IA-64) Linux");
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END ia64_linux_file_end
+
+ /* This is for -profile to use -lc_p instead of -lc. */
+ #undef CC1_SPEC
+--- gcc/config/ia64/ia64.c.jj 2007-12-07 15:41:58.000000000 +0100
++++ gcc/config/ia64/ia64.c 2007-12-07 18:43:18.000000000 +0100
+@@ -262,6 +262,8 @@ static section *ia64_select_rtx_section
+ static void ia64_output_dwarf_dtprel (FILE *, int, rtx)
+ ATTRIBUTE_UNUSED;
+ static unsigned int ia64_section_type_flags (tree, const char *, int);
++static void ia64_linux_file_end (void)
++ ATTRIBUTE_UNUSED;
+ static void ia64_init_libfuncs (void)
+ ATTRIBUTE_UNUSED;
+ static void ia64_hpux_init_libfuncs (void)
+@@ -9957,4 +9959,13 @@ ia64_c_mode_for_suffix (char suffix)
+ return VOIDmode;
+ }
+
++static void
++ia64_linux_file_end (void)
++{
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++}
++
+ #include "gt-ia64.h"
diff --git a/recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35440.patch b/recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35440.patch
new file mode 100644
index 0000000000..6bf3f0d9d8
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35440.patch
@@ -0,0 +1,56 @@
+2008-03-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35440
+ * c-pretty-print.c (pp_c_initializer_list): Handle CONSTRUCTOR
+ for all types.
+
+ * gcc.dg/pr35440.c: New test.
+
+--- gcc/c-pretty-print.c.jj 2008-02-11 14:48:12.000000000 +0100
++++ gcc/c-pretty-print.c 2008-03-19 14:50:09.000000000 +0100
+@@ -1173,6 +1173,12 @@ pp_c_initializer_list (c_pretty_printer
+ tree type = TREE_TYPE (e);
+ const enum tree_code code = TREE_CODE (type);
+
++ if (TREE_CODE (e) == CONSTRUCTOR)
++ {
++ pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
++ return;
++ }
++
+ switch (code)
+ {
+ case RECORD_TYPE:
+@@ -1207,16 +1213,12 @@ pp_c_initializer_list (c_pretty_printer
+ case VECTOR_TYPE:
+ if (TREE_CODE (e) == VECTOR_CST)
+ pp_c_expression_list (pp, TREE_VECTOR_CST_ELTS (e));
+- else if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+ else
+ break;
+ return;
+
+ case COMPLEX_TYPE:
+- if (TREE_CODE (e) == CONSTRUCTOR)
+- pp_c_constructor_elts (pp, CONSTRUCTOR_ELTS (e));
+- else if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
++ if (TREE_CODE (e) == COMPLEX_CST || TREE_CODE (e) == COMPLEX_EXPR)
+ {
+ const bool cst = TREE_CODE (e) == COMPLEX_CST;
+ pp_expression (pp, cst ? TREE_REALPART (e) : TREE_OPERAND (e, 0));
+--- gcc/testsuite/gcc.dg/pr35440.c.jj 2008-03-19 15:57:13.000000000 +0100
++++ gcc/testsuite/gcc.dg/pr35440.c 2008-03-19 15:47:35.000000000 +0100
+@@ -0,0 +1,12 @@
++/* PR c/35440 */
++/* { dg-do compile } */
++/* { dg-options "-std=gnu99" } */
++
++struct A {};
++struct B { int i; char j[2]; };
++
++void foo (void)
++{
++ (struct A){}(); /* { dg-error "called object" } */
++ (struct B){ .i = 2, .j[1] = 1 }(); /* { dg-error "called object" } */
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35751.patch b/recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35751.patch
new file mode 100644
index 0000000000..37b84275e2
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.4/fedora/gcc43-pr35751.patch
@@ -0,0 +1,114 @@
+2008-04-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35751
+ * c-decl.c (finish_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * decl.c (layout_var_decl): If extern or static var has variable
+ size, set TREE_TYPE (decl) to error_mark_node.
+
+ * gcc.dg/gomp/pr35751.c: New test.
+ * g++.dg/gomp/pr35751.C: New test.
+
+--- gcc/c-decl.c.jj 2008-04-03 09:41:42.000000000 +0200
++++ gcc/c-decl.c 2008-04-03 18:20:52.000000000 +0200
+@@ -3481,7 +3481,10 @@ finish_decl (tree decl, tree init, tree
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %q+D isn%'t constant", decl);
++ {
++ error ("storage size of %q+D isn%'t constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+
+ if (TREE_USED (type))
+--- gcc/cp/decl.c.jj 2008-03-31 23:54:40.000000000 +0200
++++ gcc/cp/decl.c 2008-04-03 18:30:19.000000000 +0200
+@@ -4442,7 +4442,10 @@ layout_var_decl (tree decl)
+ if (TREE_CODE (DECL_SIZE (decl)) == INTEGER_CST)
+ constant_expression_warning (DECL_SIZE (decl));
+ else
+- error ("storage size of %qD isn't constant", decl);
++ {
++ error ("storage size of %qD isn't constant", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ }
+ }
+ }
+
+--- gcc/testsuite/gcc.dg/gomp/pr35751.c.jj 2008-04-03 18:26:12.000000000 +0200
++++ gcc/testsuite/gcc.dg/gomp/pr35751.c 2008-04-03 18:25:51.000000000 +0200
+@@ -0,0 +1,34 @@
++/* PR c/35751 */
++/* { dg-do compile } */
++/* { dg-options "-fopenmp" } */
++
++void
++foo (int i)
++{
++ extern int a[i]; /* { dg-error "must have no linkage|storage size of" } */
++ static int b[i]; /* { dg-error "storage size of" } */
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
+--- gcc/testsuite/g++.dg/gomp/pr35751.C.jj 2008-04-03 18:32:13.000000000 +0200
++++ gcc/testsuite/g++.dg/gomp/pr35751.C 2008-04-03 18:32:32.000000000 +0200
+@@ -0,0 +1,34 @@
++// PR c/35751
++// { dg-do compile }
++// { dg-options "-fopenmp" }
++
++void
++foo (int i)
++{
++ extern int a[i]; // { dg-error "storage size of" }
++ static int b[i]; // { dg-error "storage size of" }
++
++#pragma omp parallel
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel shared (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel private (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++
++#pragma omp parallel firstprivate (a, b)
++ {
++ a[0] = 0;
++ b[0] = 0;
++ }
++}
diff --git a/recipes/obsolete/gcc/gcc-4.3.4/gcc43-build-id.patch b/recipes/obsolete/gcc/gcc-4.3.4/gcc43-build-id.patch
new file mode 100644
index 0000000000..4e162e6472
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.4/gcc43-build-id.patch
@@ -0,0 +1,74 @@
+2007-07-22 Roland McGrath <roland@redhat.com>
+
+ * config/rs6000/sysv4.h (LINK_EH_SPEC): Add --build-id for
+ non-relocatable link.
+ * config/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux.h (LINK_EH_SPEC): Likewise.
+ * config/sparc/linux64.h (LINK_EH_SPEC): Likewise.
+ * config/alpha/elf.h (LINK_EH_SPEC): Likewise.
+ * config/ia64/linux.h (LINK_EH_SPEC): Likewise.
+
+--- gcc/config/rs6000/sysv4.h.~1~
++++ gcc/config/rs6000/sysv4.h
+@@ -1044,7 +1044,7 @@ extern int fixuplabelno;
+ %{!dynamic-linker:-dynamic-linker /lib/ld.so.1}}}"
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \
+--- gcc/config/linux.h.~1~
++++ gcc/config/linux.h
+@@ -85,7 +85,7 @@ Boston, MA 02110-1301, USA. */
+ } while (0)
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ /* Define this so we can compile MS code for use with WINE. */
+--- gcc/config/sparc/linux64.h.~1~
++++ gcc/config/sparc/linux64.h
+@@ -316,7 +316,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/sparc/linux.h.~1~
++++ gcc/config/sparc/linux.h
+@@ -188,7 +188,7 @@ do { \
+ #define DITF_CONVERSION_LIBFUNCS 1
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+
+ #ifdef HAVE_AS_TLS
+--- gcc/config/alpha/elf.h.~1~
++++ gcc/config/alpha/elf.h
+@@ -453,5 +453,5 @@ extern int alpha_this_gpdisp_sequence_nu
+ I imagine that other systems will catch up. In the meantime, it
+ doesn't harm to make sure that the data exists to be used later. */
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} %{!r:--build-id} "
+ #endif
+--- gcc/config/ia64/linux.h.~1~
++++ gcc/config/ia64/linux.h
+@@ -56,7 +56,7 @@ do { \
+ Signalize that because we have fde-glibc, we don't need all C shared libs
+ linked against -lgcc_s. */
+ #undef LINK_EH_SPEC
+-#define LINK_EH_SPEC ""
++#define LINK_EH_SPEC "%{!r:--build-id} "
+
+ #define MD_UNWIND_SUPPORT "config/ia64/linux-unwind.h"
+
diff --git a/recipes/obsolete/gcc/gcc-4.3.4/gcc43-ppc64-ia64-GNU-stack.patch b/recipes/obsolete/gcc/gcc-4.3.4/gcc43-ppc64-ia64-GNU-stack.patch
new file mode 100644
index 0000000000..d49f2b9855
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.3.4/gcc43-ppc64-ia64-GNU-stack.patch
@@ -0,0 +1,86 @@
+2007-08-27 Jakub Jelinek <jakub@redhat.com>
+
+ * config/rs6000/rs6000.c (rs6000_elf_end_indicate_exec_stack): New.
+ * config/rs6000/linux64.h (TARGET_ASM_FILE_END): Use
+ rs6000_elf_end_indicate_exec_stack.
+ * config/ia64/ia64.c (ia64_linux_file_end): new.
+ * config/ia64/linux.h (TARGET_ASM_FILE_END): Use ia64_linux_file_end.
+
+--- gcc/config/rs6000/rs6000.c.jj 2007-12-07 18:41:08.000000000 +0100
++++ gcc/config/rs6000/rs6000.c 2007-12-07 18:42:12.000000000 +0100
+@@ -746,6 +746,7 @@ static void rs6000_file_start (void);
+ static int rs6000_elf_reloc_rw_mask (void);
+ static void rs6000_elf_asm_out_constructor (rtx, int);
+ static void rs6000_elf_asm_out_destructor (rtx, int);
++static void rs6000_elf_end_indicate_exec_stack (void) ATTRIBUTE_UNUSED;
+ static void rs6000_elf_asm_init_sections (void);
+ static section *rs6000_elf_select_rtx_section (enum machine_mode, rtx,
+ unsigned HOST_WIDE_INT);
+@@ -20418,6 +20419,20 @@ rs6000_elf_declare_function_name (FILE *
+ }
+ ASM_OUTPUT_LABEL (file, name);
+ }
++
++static void
++rs6000_elf_end_indicate_exec_stack (void)
++{
++ if (TARGET_32BIT)
++ file_end_indicate_exec_stack ();
++ else
++ {
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++ }
++}
+ #endif
+
+ #if TARGET_XCOFF
+--- gcc/config/rs6000/linux64.h.jj 2007-12-07 17:18:06.000000000 +0100
++++ gcc/config/rs6000/linux64.h 2007-12-07 18:41:21.000000000 +0100
+@@ -504,7 +504,7 @@ extern int dot_symbols;
+ #undef DRAFT_V4_STRUCT_RET
+ #define DRAFT_V4_STRUCT_RET (!TARGET_64BIT)
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END rs6000_elf_end_indicate_exec_stack
+
+ #define TARGET_POSIX_IO
+
+--- gcc/config/ia64/linux.h.jj 2007-12-07 18:17:43.000000000 +0100
++++ gcc/config/ia64/linux.h 2007-12-07 18:41:21.000000000 +0100
+@@ -5,7 +5,7 @@
+
+ #define TARGET_VERSION fprintf (stderr, " (IA-64) Linux");
+
+-#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++#define TARGET_ASM_FILE_END ia64_linux_file_end
+
+ /* This is for -profile to use -lc_p instead of -lc. */
+ #undef CC1_SPEC
+--- gcc/config/ia64/ia64.c.jj 2007-12-07 15:41:58.000000000 +0100
++++ gcc/config/ia64/ia64.c 2007-12-07 18:43:18.000000000 +0100
+@@ -262,6 +262,8 @@ static section *ia64_select_rtx_section
+ static void ia64_output_dwarf_dtprel (FILE *, int, rtx)
+ ATTRIBUTE_UNUSED;
+ static unsigned int ia64_section_type_flags (tree, const char *, int);
++static void ia64_linux_file_end (void)
++ ATTRIBUTE_UNUSED;
+ static void ia64_init_libfuncs (void)
+ ATTRIBUTE_UNUSED;
+ static void ia64_hpux_init_libfuncs (void)
+@@ -9957,4 +9959,13 @@ ia64_c_mode_for_suffix (char suffix)
+ return VOIDmode;
+ }
+
++static void
++ia64_linux_file_end (void)
++{
++ int saved_trampolines_created = trampolines_created;
++ trampolines_created = 0;
++ file_end_indicate_exec_stack ();
++ trampolines_created = saved_trampolines_created;
++}
++
+ #include "gt-ia64.h"
diff --git a/recipes/obsolete/gcc/gcc-4.4.4/gcc-arm-cp15-tpreg-for-TLS.patch b/recipes/obsolete/gcc/gcc-4.4.4/gcc-arm-cp15-tpreg-for-TLS.patch
new file mode 100644
index 0000000000..a3fbdcee3c
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-4.4.4/gcc-arm-cp15-tpreg-for-TLS.patch
@@ -0,0 +1,217 @@
+Backport the below patch from trunk. This will let gcc use
+Hard TLS register on ARMv7 so far it has been using soft access
+this should help improve performance.
+
+2010-02-01 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.c (FL_FOR_ARCH_7A): is also a superset of ARMv6K.
+ (arm_override_options): Allow automatic selection of the thread
+ pointer register if thumb2.
+ (legitimize_pic_address): Improve code sequences for Thumb2.
+ (arm_call_tls_get_addr): Likewise.
+ (legitimize_tls_address): Likewise.
+ * arm.md (pic_load_addr_arm): Delete. Replace with ...
+ (pic_load_addr_32bit): ... this. New named pattern.
+ * thumb2.md (pic_load_addr_thumb2): Delete.
+ (pic_load_dot_plus_four): Delete.
+ (tls_load_dot_plus_four): New named pattern.
+
+
+Index: gcc-4.4.4/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.4.4.orig/gcc/config/arm/arm.c 2010-02-18 05:13:03.000000000 -0800
++++ gcc-4.4.4/gcc/config/arm/arm.c 2010-07-09 15:07:03.829739455 -0700
+@@ -495,7 +495,7 @@ static int thumb_call_reg_needed;
+ #define FL_FOR_ARCH6T2 (FL_FOR_ARCH6 | FL_THUMB2)
+ #define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM)
+ #define FL_FOR_ARCH7 (FL_FOR_ARCH6T2 &~ FL_NOTM)
+-#define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM)
++#define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
+ #define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_DIV)
+ #define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_DIV)
+
+@@ -1549,7 +1549,7 @@ arm_override_options (void)
+ /* Use the cp15 method if it is available. */
+ if (target_thread_pointer == TP_AUTO)
+ {
+- if (arm_arch6k && !TARGET_THUMB)
++ if (arm_arch6k && !TARGET_THUMB1)
+ target_thread_pointer = TP_CP15;
+ else
+ target_thread_pointer = TP_SOFT;
+@@ -3634,10 +3634,8 @@ legitimize_pic_address (rtx orig, enum m
+ else
+ address = reg;
+
+- if (TARGET_ARM)
+- emit_insn (gen_pic_load_addr_arm (address, orig));
+- else if (TARGET_THUMB2)
+- emit_insn (gen_pic_load_addr_thumb2 (address, orig));
++ if (TARGET_32BIT)
++ emit_insn (gen_pic_load_addr_32bit (address, orig));
+ else /* TARGET_THUMB1 */
+ emit_insn (gen_pic_load_addr_thumb1 (address, orig));
+
+@@ -3814,7 +3812,7 @@ arm_load_pic_register (unsigned long sav
+ {
+ pic_rtx = gen_rtx_SYMBOL_REF (Pmode, VXWORKS_GOTT_BASE);
+ pic_rtx = gen_rtx_CONST (Pmode, pic_rtx);
+- emit_insn (gen_pic_load_addr_arm (pic_reg, pic_rtx));
++ emit_insn (gen_pic_load_addr_32bit (pic_reg, pic_rtx));
+
+ emit_insn (gen_rtx_SET (Pmode, pic_reg, gen_rtx_MEM (Pmode, pic_reg)));
+
+@@ -3837,29 +3835,13 @@ arm_load_pic_register (unsigned long sav
+ UNSPEC_GOTSYM_OFF);
+ pic_rtx = gen_rtx_CONST (Pmode, pic_rtx);
+
+- if (TARGET_ARM)
+- {
+- emit_insn (gen_pic_load_addr_arm (pic_reg, pic_rtx));
+- emit_insn (gen_pic_add_dot_plus_eight (pic_reg, pic_reg, labelno));
+- }
+- else if (TARGET_THUMB2)
++ if (TARGET_32BIT)
+ {
+- /* Thumb-2 only allows very limited access to the PC. Calculate the
+- address in a temporary register. */
+- if (arm_pic_register != INVALID_REGNUM)
+- {
+- pic_tmp = gen_rtx_REG (SImode,
+- thumb_find_work_register (saved_regs));
+- }
++ emit_insn (gen_pic_load_addr_32bit (pic_reg, pic_rtx));
++ if (TARGET_ARM)
++ emit_insn (gen_pic_add_dot_plus_eight (pic_reg, pic_reg, labelno));
+ else
+- {
+- gcc_assert (can_create_pseudo_p ());
+- pic_tmp = gen_reg_rtx (Pmode);
+- }
+-
+- emit_insn (gen_pic_load_addr_thumb2 (pic_reg, pic_rtx));
+- emit_insn (gen_pic_load_dot_plus_four (pic_tmp, labelno));
+- emit_insn (gen_addsi3 (pic_reg, pic_reg, pic_tmp));
++ emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));
+ }
+ else /* TARGET_THUMB1 */
+ {
+@@ -4499,14 +4481,7 @@ arm_call_tls_get_addr (rtx x, rtx reg, r
+ if (TARGET_ARM)
+ emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
+ else if (TARGET_THUMB2)
+- {
+- rtx tmp;
+- /* Thumb-2 only allows very limited access to the PC. Calculate
+- the address in a temporary register. */
+- tmp = gen_reg_rtx (SImode);
+- emit_insn (gen_pic_load_dot_plus_four (tmp, labelno));
+- emit_insn (gen_addsi3(reg, reg, tmp));
+- }
++ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+ else /* TARGET_THUMB1 */
+ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+
+@@ -4562,15 +4537,7 @@ legitimize_tls_address (rtx x, rtx reg)
+ if (TARGET_ARM)
+ emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno));
+ else if (TARGET_THUMB2)
+- {
+- rtx tmp;
+- /* Thumb-2 only allows very limited access to the PC. Calculate
+- the address in a temporary register. */
+- tmp = gen_reg_rtx (SImode);
+- emit_insn (gen_pic_load_dot_plus_four (tmp, labelno));
+- emit_insn (gen_addsi3(reg, reg, tmp));
+- emit_move_insn (reg, gen_const_mem (SImode, reg));
+- }
++ emit_insn (gen_tls_load_dot_plus_four (reg, reg, labelno));
+ else
+ {
+ emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
+Index: gcc-4.4.4/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4.4.4.orig/gcc/config/arm/arm.md 2010-02-18 05:13:03.000000000 -0800
++++ gcc-4.4.4/gcc/config/arm/arm.md 2010-07-09 15:07:03.833742490 -0700
+@@ -5091,14 +5091,17 @@
+ ;; the insn alone, and to force the minipool generation pass to then move
+ ;; the GOT symbol to memory.
+
+-(define_insn "pic_load_addr_arm"
++(define_insn "pic_load_addr_32bit"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "" "mX")] UNSPEC_PIC_SYM))]
+- "TARGET_ARM && flag_pic"
++ "TARGET_32BIT && flag_pic"
+ "ldr%?\\t%0, %1"
+ [(set_attr "type" "load1")
+- (set (attr "pool_range") (const_int 4096))
+- (set (attr "neg_pool_range") (const_int 4084))]
++ (set_attr "pool_range" "4096")
++ (set (attr "neg_pool_range")
++ (if_then_else (eq_attr "is_thumb" "no")
++ (const_int 4084)
++ (const_int 0)))]
+ )
+
+ (define_insn "pic_load_addr_thumb1"
+@@ -5116,7 +5119,7 @@
+ (const_int 4)
+ (match_operand 2 "" "")]
+ UNSPEC_PIC_BASE))]
+- "TARGET_THUMB1"
++ "TARGET_THUMB"
+ "*
+ (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
+ INTVAL (operands[2]));
+Index: gcc-4.4.4/gcc/config/arm/thumb2.md
+===================================================================
+--- gcc-4.4.4.orig/gcc/config/arm/thumb2.md 2010-02-24 06:50:43.000000000 -0800
++++ gcc-4.4.4/gcc/config/arm/thumb2.md 2010-07-09 15:07:03.829739455 -0700
+@@ -243,37 +243,19 @@
+ (set_attr "neg_pool_range" "*,*,*,*,0,*")]
+ )
+
+-;; ??? We can probably do better with thumb2
+-(define_insn "pic_load_addr_thumb2"
+- [(set (match_operand:SI 0 "s_register_operand" "=r")
+- (unspec:SI [(match_operand:SI 1 "" "mX")] UNSPEC_PIC_SYM))]
+- "TARGET_THUMB2 && flag_pic"
+- "ldr%?\\t%0, %1"
+- [(set_attr "type" "load1")
+- (set_attr "pool_range" "4096")
+- (set_attr "neg_pool_range" "0")]
+-)
+-
+-;; Set reg to the address of this instruction plus four. The low two
+-;; bits of the PC are always read as zero, so ensure the instructions is
+-;; word aligned.
+-(define_insn "pic_load_dot_plus_four"
+- [(set (match_operand:SI 0 "register_operand" "=r")
+- (unspec:SI [(const_int 4)
+- (match_operand 1 "" "")]
+- UNSPEC_PIC_BASE))]
++(define_insn "tls_load_dot_plus_four"
++ [(set (match_operand:SI 0 "register_operand" "=l,r")
++ (mem:SI (unspec:SI [(match_operand:SI 1 "register_operand" "+l,r")
++ (const_int 4)
++ (match_operand 2 "" "")]
++ UNSPEC_PIC_BASE)))]
+ "TARGET_THUMB2"
+ "*
+- assemble_align(BITS_PER_WORD);
+ (*targetm.asm_out.internal_label) (asm_out_file, \"LPIC\",
+- INTVAL (operands[1]));
+- /* We use adr because some buggy gas assemble add r8, pc, #0
+- to add.w r8, pc, #0, not addw r8, pc, #0. */
+- asm_fprintf (asm_out_file, \"\\tadr\\t%r, %LLPIC%d + 4\\n\",
+- REGNO(operands[0]), (int)INTVAL (operands[1]));
+- return \"\";
++ INTVAL (operands[2]));
++ return \"add\\t%1, %|pc\;ldr%?\\t%0, [%1]\";
+ "
+- [(set_attr "length" "6")]
++ [(set_attr "length" "4,6")]
+ )
+
+ ;; Thumb-2 always has load/store halfword instructions, so we can avoid a lot
diff --git a/recipes/obsolete/gcc/gcc-csl-arm-2008q3/gfortran-csl.patch b/recipes/obsolete/gcc/gcc-csl-arm-2008q3/gfortran-csl.patch
new file mode 100644
index 0000000000..0c42851ce1
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-csl-arm-2008q3/gfortran-csl.patch
@@ -0,0 +1,40 @@
+The patch below fixes a crash building libgfortran on arm-linux-gnueabi.
+
+This target doesn't really have a 128-bit integer type, however it does use
+TImode to represent the return value of certain special ABI defined library
+functions. This results in type_for_size(TImode) being called.
+
+Because TImode deosn't correspond to any gfortran integer kind
+gfc_type_for_size returns NULL and we segfault shortly after.
+
+The patch below fixes this by making gfc_type_for_size handle TImode in the
+same way as the C frontend.
+
+Tested on x86_64-linux and arm-linux-gnueabi.
+Applied to trunk.
+
+Paul
+
+2007-05-15 Paul Brook <paul@codesourcery.com>
+
+ gcc/fortran/
+ * trans-types.c (gfc_type_for_size): Handle signed TImode.
+
+Index: gcc-4.2.1/gcc/fortran/trans-types.c
+===================================================================
+--- gcc-4.2.1/gcc/fortran/trans-types.c (revision 170435)
++++ gcc-4.2.1/gcc/fortran/trans-types.c (working copy)
+@@ -1800,6 +1800,13 @@ gfc_type_for_size (unsigned bits, int un
+ if (type && bits == TYPE_PRECISION (type))
+ return type;
+ }
++
++ /* Handle TImode as a special case because it is used by some backends
++ (eg. ARM) even though it is not available for normal use. */
++#if HOST_BITS_PER_WIDE_INT >= 65
++ if (bits == TYPE_PRECISION (intTI_type_node))
++ return intTI_type_node;
++#endif
+ }
+ else
+ {
diff --git a/recipes/obsolete/gcc/gcc-csl-arm/no-libfloat.patch b/recipes/obsolete/gcc/gcc-csl-arm/no-libfloat.patch
new file mode 100644
index 0000000000..e5d12cfb4f
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-csl-arm/no-libfloat.patch
@@ -0,0 +1,11 @@
+--- gcc/gcc/config/arm/linux-elf.h.old 2005-04-20 00:46:28.923375320 +0100
++++ gcc/gcc/config/arm/linux-elf.h 2005-04-20 00:46:34.181575952 +0100
+@@ -56,7 +56,7 @@
+ %{shared:-lc} \
+ %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} %{mfloat-abi=soft*:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add
+ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
diff --git a/recipes/obsolete/gcc/gcc-csl-arm/pic-without-sl.patch b/recipes/obsolete/gcc/gcc-csl-arm/pic-without-sl.patch
new file mode 100644
index 0000000000..9a49794da4
--- /dev/null
+++ b/recipes/obsolete/gcc/gcc-csl-arm/pic-without-sl.patch
@@ -0,0 +1,303 @@
+Index: gcc/config/arm/arm-protos.h
+===================================================================
+RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm-protos.h,v
+retrieving revision 1.60.4.20
+diff -u -r1.60.4.20 arm-protos.h
+--- gcc/config/arm/arm-protos.h 29 Mar 2005 03:00:11 -0000 1.60.4.20
++++ gcc/config/arm/arm-protos.h 23 Apr 2005 04:41:06 -0000
+@@ -64,6 +64,7 @@
+ extern enum reg_class vfp_secondary_reload_class (enum machine_mode, rtx);
+ extern int tls_symbolic_operand (rtx, enum machine_mode);
+ extern bool arm_tls_operand_p (rtx x);
++extern bool arm_pc_pic_operand_p (rtx x);
+
+ /* Predicates. */
+ extern int s_register_operand (rtx, enum machine_mode);
+Index: gcc/config/arm/arm.c
+===================================================================
+RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm.c,v
+retrieving revision 1.303.2.79
+diff -u -r1.303.2.79 arm.c
+--- gcc/config/arm/arm.c 12 Apr 2005 06:17:07 -0000 1.303.2.79
++++ gcc/config/arm/arm.c 23 Apr 2005 04:41:09 -0000
+@@ -1003,7 +1003,7 @@
+
+ /* If stack checking is disabled, we can use r10 as the PIC register,
+ which keeps r9 available. */
+- if (flag_pic)
++ if (0 && flag_pic)
+ arm_pic_register = TARGET_APCS_STACK ? 9 : 10;
+
+ if (TARGET_APCS_FLOAT)
+@@ -3120,6 +3120,10 @@
+ rtx
+ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
+ {
++ if (GET_CODE (orig) == UNSPEC
++ && XINT (orig, 1) == UNSPEC_GOTSLOTPC)
++ abort ();
++
+ if (GET_CODE (orig) == SYMBOL_REF
+ || GET_CODE (orig) == LABEL_REF)
+ {
+@@ -3149,27 +3153,80 @@
+ else
+ address = reg;
+
+- if (TARGET_ARM)
+- emit_insn (gen_pic_load_addr_arm (address, orig));
+- else
+- emit_insn (gen_pic_load_addr_thumb (address, orig));
++ if (arm_pic_register != INVALID_REGNUM)
++ {
++ /* Using GP-based PIC addressing. */
++ if (TARGET_ARM)
++ emit_insn (gen_pic_load_addr_arm (address, orig));
++ else
++ emit_insn (gen_pic_load_addr_thumb (address, orig));
++
++ if ((GET_CODE (orig) == LABEL_REF
++ || (GET_CODE (orig) == SYMBOL_REF &&
++ SYMBOL_REF_LOCAL_P (orig)))
++ && NEED_GOT_RELOC)
++ pic_ref = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, address);
++ else
++ {
++ pic_ref = gen_rtx_MEM (Pmode,
++ gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
++ address));
++ RTX_UNCHANGING_P (pic_ref) = 1;
++ }
+
+- if ((GET_CODE (orig) == LABEL_REF
+- || (GET_CODE (orig) == SYMBOL_REF &&
+- SYMBOL_REF_LOCAL_P (orig)))
+- && NEED_GOT_RELOC)
+- pic_ref = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, address);
++ current_function_uses_pic_offset_table = 1;
++ }
+ else
+ {
+- pic_ref = gen_rtx_MEM (Pmode,
+- gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
+- address));
+- RTX_UNCHANGING_P (pic_ref) = 1;
++ /* Using PC-based PIC addressing. */
++ rtx label, tmp;
++ int offset;
++
++ label = gen_label_rtx ();
++ offset = TARGET_ARM ? 8 : 4;
++
++ if (GET_CODE (orig) == LABEL_REF
++ || (GET_CODE (orig) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (orig)))
++ {
++ /* This symbol is defined locally. We don't need a GOT entry. */
++ tmp = gen_rtx_MINUS (Pmode, gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM), gen_rtx_PLUS (Pmode,
++ gen_rtx_LABEL_REF (Pmode, label),
++ GEN_INT (offset)));
++
++ load_tls_operand (tmp, address);
++
++ if (TARGET_ARM)
++ emit_insn (gen_pic_add_dot_plus_eight (address, label));
++ else
++ emit_insn (gen_pic_add_dot_plus_four (address, label));
++ }
++ else
++ {
++ rtx x = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_GOTSLOTPC);
++ rtx dummy_label;
++
++ dummy_label = gen_label_rtx ();
++ LABEL_PRESERVE_P (dummy_label) = 1;
++ LABEL_NUSES (dummy_label) = 1;
++
++ tmp = gen_rtx_MINUS (Pmode, x, gen_rtx_PLUS (Pmode,
++ gen_rtx_LABEL_REF (Pmode, label),
++ GEN_INT (offset)));
++
++ load_tls_operand (tmp, address);
++
++ if (TARGET_ARM)
++ emit_insn (gen_tls_load_dot_plus_eight (address, address, label, dummy_label));
++ else
++ emit_insn (gen_tls_load_dot_plus_four (address, address, label, dummy_label));
++ }
++
++ pic_ref = address;
+ }
+
+ insn = emit_move_insn (reg, pic_ref);
+ #endif
+- current_function_uses_pic_offset_table = 1;
++
+ /* Put a REG_EQUAL note on this insn, so that it can be optimized
+ by loop. */
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
+@@ -3179,11 +3236,17 @@
+ else if (GET_CODE (orig) == CONST)
+ {
+ rtx base, offset;
++ bool minus = FALSE;
+
+ if (GET_CODE (XEXP (orig, 0)) == PLUS
+ && XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
+ return orig;
+
++ if (GET_CODE (XEXP (orig, 0)) == MINUS
++ && GET_CODE (XEXP (XEXP (orig, 0), 0)) == UNSPEC
++ && XINT (XEXP (XEXP (orig, 0), 0), 1) == UNSPEC_GOTSLOTPC)
++ return orig;
++
+ if (GET_CODE (XEXP (orig, 0)) == UNSPEC)
+ return orig;
+
+@@ -3201,6 +3264,13 @@
+ offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
+ base == reg ? 0 : reg);
+ }
++ else if (GET_CODE (XEXP (orig, 0)) == MINUS)
++ {
++ minus = TRUE;
++ base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
++ offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
++ base == reg ? 0 : reg);
++ }
+ else
+ abort ();
+
+@@ -3228,7 +3298,7 @@
+ return reg;
+ }
+
+- return gen_rtx_PLUS (Pmode, base, offset);
++ return minus ? gen_rtx_MINUS (Pmode, base, offset) : gen_rtx_PLUS (Pmode, base, offset);
+ }
+
+ return orig;
+@@ -3267,7 +3337,7 @@
+ rtx l1, pic_tmp, pic_tmp2, pic_rtx;
+ rtx global_offset_table;
+
+- if (current_function_uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE)
++ if (current_function_uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE || arm_pic_register == INVALID_REGNUM)
+ return;
+
+ if (!flag_pic)
+@@ -3341,8 +3411,11 @@
+ static int
+ pcrel_constant_p (rtx x)
+ {
++ if (GET_CODE (x) == CONST)
++ return pcrel_constant_p (XEXP (x, 0));
++
+ if (GET_CODE (x) == MINUS)
+- return symbol_mentioned_p (XEXP (x, 0)) && label_mentioned_p (XEXP (x, 1));
++ return (((GET_CODE (XEXP (x, 0)) == UNSPEC && XINT (XEXP (x, 0), 1) == UNSPEC_PIC_SYM)) || symbol_mentioned_p (XEXP (x, 0))) && label_mentioned_p (XEXP (x, 1));
+
+ if (GET_CODE (x) == UNSPEC
+ && XINT (x, 1) == UNSPEC_TLS
+@@ -3946,12 +4019,32 @@
+ return SYMBOL_REF_TLS_MODEL (op);
+ }
+
++bool
++arm_pc_pic_operand_p (rtx op)
++{
++ if (GET_CODE (op) == CONST
++ && GET_CODE (XEXP (op, 0)) == MINUS
++ && GET_CODE (XEXP (XEXP (op, 0), 0)) == UNSPEC
++ && XINT (XEXP (XEXP (op, 0), 0), 1) == UNSPEC_GOTSLOTPC)
++ return 1;
++
++ if (GET_CODE (op) == CONST
++ && GET_CODE (XEXP (op, 0)) == MINUS
++ && GET_CODE (XEXP (XEXP (op, 0), 0)) == UNSPEC
++ && XINT (XEXP (XEXP (op, 0), 0), 1) == UNSPEC_PIC_SYM)
++ return 1;
++
++ return 0;
++}
++
+ /* Valid input to a move instruction. */
+ int
+ move_input_operand (rtx op, enum machine_mode mode)
+ {
+ if (tls_symbolic_operand (op, mode))
+ return 0;
++ if (pcrel_constant_p (op))
++ return 1;
+ return general_operand (op, mode);
+ }
+
+@@ -15634,11 +15727,34 @@
+ return TRUE;
+ }
+
++static bool
++arm_emit_got_decoration (FILE *fp, rtx x)
++{
++ rtx val;
++
++ val = XVECEXP (x, 0, 0);
++
++ fputs ("_gotslotpc_(", fp);
++
++ output_addr_const (fp, val);
++
++ fputc (')', fp);
++
++ return TRUE;
++}
++
+ bool
+ arm_output_addr_const_extra (FILE *fp, rtx x)
+ {
+ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLS)
+ return arm_emit_tls_decoration (fp, x);
++ else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_GOTSLOTPC)
++ return arm_emit_got_decoration (fp, x);
++ else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_PIC_SYM)
++ {
++ output_addr_const (fp, XVECEXP (x, 0, 0));
++ return TRUE;
++ }
+ else if (GET_CODE (x) == CONST_VECTOR)
+ return arm_emit_vector_const (fp, x);
+
+Index: gcc/config/arm/arm.md
+===================================================================
+RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm.md,v
+retrieving revision 1.145.2.31
+diff -u -r1.145.2.31 arm.md
+--- gcc/config/arm/arm.md 28 Mar 2005 19:04:37 -0000 1.145.2.31
++++ gcc/config/arm/arm.md 23 Apr 2005 04:41:11 -0000
+@@ -88,6 +88,7 @@
+ (UNSPEC_WMADDS 18) ; Used by the intrinsic form of the iWMMXt WMADDS instruction.
+ (UNSPEC_WMADDU 19) ; Used by the intrinsic form of the iWMMXt WMADDU instruction.
+ (UNSPEC_TLS 20) ; A symbol that has been treated properly for TLS usage.
++ (UNSPEC_GOTSLOTPC 21)
+ ]
+ )
+
+@@ -4179,7 +4180,8 @@
+ && (CONSTANT_P (operands[1])
+ || symbol_mentioned_p (operands[1])
+ || label_mentioned_p (operands[1]))
+- && ! tls_mentioned_p (operands[1]))
++ && ! tls_mentioned_p (operands[1])
++ && ! arm_pc_pic_operand_p (operands[1]))
+ operands[1] = legitimize_pic_address (operands[1], SImode,
+ (no_new_pseudos ? operands[0] : 0));
+ }
+@@ -4412,7 +4414,8 @@
+ (mem:SI (unspec:SI [(plus:SI (match_dup 0)
+ (const (plus:SI (pc) (const_int 8))))]
+ UNSPEC_PIC_BASE)))
+- (use (label_ref (match_operand 1 "" "")))])]
++ (use (label_ref (match_operand 1 "" "")))
++ (use (label_ref (match_operand 1 "" "")))])]
+ ""
+ )
+