From a23e98361eb9c1183964b89987a8cf65e2fc4929 Mon Sep 17 00:00:00 2001 From: Martin Jansa Date: Tue, 7 Dec 2010 13:17:36 +0100 Subject: u-boot_git: add support for nokia900 Signed-off-by: Martin Jansa --- conf/machine/nokia900.conf | 1 + ...ompiler-optimization-for-usages-of-readb-.patch | 61 ++ .../0001-Reduce-delays-in-omap-i2c-driver.patch | 68 ++ ...ia-rx51-use-O0-as-work-around-for-gcc-4.5.patch | 26 + ...optionally-use-pre-existing-atags-for-Lin.patch | 97 ++ ...existing-atags-at-startup-if-chainloading.patch | 45 + .../0004-Nokia-RX-51-aka-N900-support.patch | 1130 ++++++++++++++++++++ ...ing-file-from-ext2-partition-on-OMAP3-evm.patch | 33 + .../nokia900/0006-omap3_mmc.c-fix-formating.patch | 28 + .../0007-Only-delay-boot-if-keyboard-open.patch | 43 + ...ia_rx51.h-use-ext2-instead-of-fat-for-1st.patch | 30 + ...ia_rx51.h-integrate-SHR-boot.scr-to-defau.patch | 90 ++ ...ia_rx51.h-call-mmc-init-manually-because-.patch | 37 + ...ia_rx51.h-don-t-set-atags-when-booting-fr.patch | 37 + recipes/u-boot/u-boot_git.bb | 22 + 15 files changed, 1748 insertions(+) create mode 100644 recipes/u-boot/u-boot-git/nokia900/0001-ARM-Avoid-compiler-optimization-for-usages-of-readb-.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0001-Reduce-delays-in-omap-i2c-driver.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0001-nokia-rx51-use-O0-as-work-around-for-gcc-4.5.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0002-Make-bootm-optionally-use-pre-existing-atags-for-Lin.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0003-Store-existing-atags-at-startup-if-chainloading.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0004-Nokia-RX-51-aka-N900-support.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0005-fix-loading-file-from-ext2-partition-on-OMAP3-evm.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0006-omap3_mmc.c-fix-formating.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0007-Only-delay-boot-if-keyboard-open.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0008-configs-nokia_rx51.h-use-ext2-instead-of-fat-for-1st.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0009-configs-nokia_rx51.h-integrate-SHR-boot.scr-to-defau.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0010-configs-nokia_rx51.h-call-mmc-init-manually-because-.patch create mode 100644 recipes/u-boot/u-boot-git/nokia900/0011-configs-nokia_rx51.h-don-t-set-atags-when-booting-fr.patch diff --git a/conf/machine/nokia900.conf b/conf/machine/nokia900.conf index 6d1f0f66e9..351dc9c8d4 100644 --- a/conf/machine/nokia900.conf +++ b/conf/machine/nokia900.conf @@ -57,6 +57,7 @@ KERNEL_IMAGETYPE = "uImage" UBOOT_ENTRYPOINT = "0x80008000" UBOOT_LOADADDRESS = "0x80008000" +EXTRA_IMAGEDEPENDS += "u-boot" ROOT_FLASH_SIZE = "100" EXTRA_IMAGECMD_jffs2_nokia900 = "--pad --little-endian --eraseblock=0x20000 -n" diff --git a/recipes/u-boot/u-boot-git/nokia900/0001-ARM-Avoid-compiler-optimization-for-usages-of-readb-.patch b/recipes/u-boot/u-boot-git/nokia900/0001-ARM-Avoid-compiler-optimization-for-usages-of-readb-.patch new file mode 100644 index 0000000000..73ce36aff7 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0001-ARM-Avoid-compiler-optimization-for-usages-of-readb-.patch @@ -0,0 +1,61 @@ +From a6154b8604c4cf1c9c44cf15524102e4e258a238 Mon Sep 17 00:00:00 2001 +From: Alexander Holler +Date: Wed, 22 Dec 2010 01:04:22 +0000 +Subject: [PATCH] ARM: Avoid compiler optimization for usages of readb, writeb and friends. + +gcc 4.5.1 seems to ignore (at least some) volatile definitions, +avoid that as done in the kernel. + +Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that +gcc version to ignore the volatile type qualifier used e.g. in __arch_getl(). +Anyway, using a definition as in the kernel headers avoids such optimizations when +gcc 4.5.1 is used. + +Maybe the headers as used in the current linux-kernel should be used, +but to avoid large changes, I've just added a small change to the current headers. + +I haven't add the definitions which are using a memory barrier because I haven't found +a place in the kernel where they were actually enabled (CONFIG_ARM_DMA_MEM_BUFFERABLE). + +Signed-off-by: Alexander Holler +Signed-off-by: Wolfgang Denk +Acked-by: Dirk Behme +--- + arch/arm/include/asm/io.h | 20 ++++++++++++++------ + 1 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h +index ff1518e..068ed17 100644 +--- a/arch/arm/include/asm/io.h ++++ b/arch/arm/include/asm/io.h +@@ -125,13 +125,21 @@ extern inline void __raw_readsl(unsigned int addr, void *data, int longlen) + #define __raw_readw(a) __arch_getw(a) + #define __raw_readl(a) __arch_getl(a) + +-#define writeb(v,a) __arch_putb(v,a) +-#define writew(v,a) __arch_putw(v,a) +-#define writel(v,a) __arch_putl(v,a) ++/* ++ * TODO: The kernel offers some more advanced versions of barriers, it might ++ * have some advantages to use them instead of the simple one here. ++ */ ++#define dmb() __asm__ __volatile__ ("" : : : "memory") ++#define __iormb() dmb() ++#define __iowmb() dmb() ++ ++#define writeb(v,c) do { __iowmb(); __arch_putb(v,c); } while (0) ++#define writew(v,c) do { __iowmb(); __arch_putw(v,c); } while (0) ++#define writel(v,c) do { __iowmb(); __arch_putl(v,c); } while (0) + +-#define readb(a) __arch_getb(a) +-#define readw(a) __arch_getw(a) +-#define readl(a) __arch_getl(a) ++#define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; }) ++#define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; }) ++#define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; }) + + /* + * The compiler seems to be incapable of optimising constants +-- +1.7.3.4 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0001-Reduce-delays-in-omap-i2c-driver.patch b/recipes/u-boot/u-boot-git/nokia900/0001-Reduce-delays-in-omap-i2c-driver.patch new file mode 100644 index 0000000000..ab95900554 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0001-Reduce-delays-in-omap-i2c-driver.patch @@ -0,0 +1,68 @@ +From 18b7882e3cdc4ba80dc6952cb7b567db45ddb819 Mon Sep 17 00:00:00 2001 +From: Alistair Buxton +Date: Sun, 5 Sep 2010 22:05:53 +0100 +Subject: [PATCH 1/9] Reduce delays in omap i2c driver. + +The calls to udelay in the omap i2c driver make i2c access very slow. +Checking the twl4030 keypad requires about 10 register accesses and +this can take up to 1 second, causing high input latency. I reduced all +the delays by a factor of 10 and this did not seem to affect anything +but makes the keyboard input much nicer. + +Signed-off-by: Alistair Buxton +--- + drivers/i2c/omap24xx_i2c.c | 10 +++++----- + 1 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c +index 7c98f15..86602a6 100644 +--- a/drivers/i2c/omap24xx_i2c.c ++++ b/drivers/i2c/omap24xx_i2c.c +@@ -162,7 +162,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) + if (status & I2C_STAT_XRDY) { + /* Important: have to use byte access */ + writeb (regoffset, &i2c_base->data); +- udelay (20000); ++ udelay (2000); + if (readw (&i2c_base->stat) & I2C_STAT_NACK) { + i2c_error = 1; + } +@@ -174,7 +174,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) + writew (I2C_CON_EN, &i2c_base->con); + while (readw(&i2c_base->stat) & + (I2C_STAT_XRDY | I2C_STAT_ARDY)) { +- udelay (10000); ++ udelay (1000); + /* Have to clear pending interrupt to clear I2C_STAT */ + writew (0xFFFF, &i2c_base->stat); + } +@@ -195,7 +195,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) + #else + *value = readw (&i2c_base->data); + #endif +- udelay (20000); ++ udelay (2000); + } else { + i2c_error = 1; + } +@@ -204,7 +204,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) + writew (I2C_CON_EN, &i2c_base->con); + while (readw (&i2c_base->stat) & + (I2C_STAT_RRDY | I2C_STAT_ARDY)) { +- udelay (10000); ++ udelay (1000); + writew (0xFFFF, &i2c_base->stat); + } + } +@@ -254,7 +254,7 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) + writew ((value << 8) + regoffset, &i2c_base->data); + #endif + /* must have enough delay to allow BB bit to go low */ +- udelay (50000); ++ udelay (5000); + if (readw (&i2c_base->stat) & I2C_STAT_NACK) { + i2c_error = 1; + } +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0001-nokia-rx51-use-O0-as-work-around-for-gcc-4.5.patch b/recipes/u-boot/u-boot-git/nokia900/0001-nokia-rx51-use-O0-as-work-around-for-gcc-4.5.patch new file mode 100644 index 0000000000..d3e72b8072 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0001-nokia-rx51-use-O0-as-work-around-for-gcc-4.5.patch @@ -0,0 +1,26 @@ +From beda5431f747669440b52c9340bda843d6440e69 Mon Sep 17 00:00:00 2001 +From: Martin Jansa +Date: Thu, 23 Dec 2010 21:04:25 +0100 +Subject: [PATCH] nokia/rx51: use -O0 as work around for gcc-4.5 + +--- + board/nokia/rx51/Makefile | 3 +++ + 1 files changed, 3 insertions(+), 0 deletions(-) + +diff --git a/board/nokia/rx51/Makefile b/board/nokia/rx51/Makefile +index 31ad6fd..986af23 100644 +--- a/board/nokia/rx51/Makefile ++++ b/board/nokia/rx51/Makefile +@@ -23,6 +23,9 @@ + + include $(TOPDIR)/config.mk + ++# gcc-4.5 breaks generated code if -O1+ or -Os is used ++CFLAGS += -O0 ++ + LIB = $(obj)lib$(BOARD).a + + COBJS := rx51.o +-- +1.7.3.4 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0002-Make-bootm-optionally-use-pre-existing-atags-for-Lin.patch b/recipes/u-boot/u-boot-git/nokia900/0002-Make-bootm-optionally-use-pre-existing-atags-for-Lin.patch new file mode 100644 index 0000000000..681af4df26 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0002-Make-bootm-optionally-use-pre-existing-atags-for-Lin.patch @@ -0,0 +1,97 @@ +From b05e635c24a65e5efc540694bbaa33055f3180c6 Mon Sep 17 00:00:00 2001 +From: Alistair Buxton +Date: Wed, 1 Sep 2010 23:07:20 +0100 +Subject: [PATCH 2/9] Make bootm optionally use pre-existing atags for Linux kernel boot. + +This patch adapts the bootm command so that it can use an existing atags command +set up by a previous bootloader. If the environment variable "atags" is unset, +bootm behaves as normal. If "atags" is set, bootm will skip all boot args setup +entirely, and pass the address found in "atags". For example, if a previous boot +loader already set up the atags struct at 0x80000100: + +setenv atags 0x80000100; bootm 0x80008000 + +Signed-off-by: Alistair Buxton +--- + arch/arm/lib/bootm.c | 35 +++++++++++++++++++++++++---------- + 1 files changed, 25 insertions(+), 10 deletions(-) + +diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c +index 3101321..82186f8 100644 +--- a/arch/arm/lib/bootm.c ++++ b/arch/arm/lib/bootm.c +@@ -55,6 +55,12 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima + bd_t *bd = gd->bd; + char *s; + int machid = bd->bi_arch_number; ++#ifdef CONFIG_CHAINLOADER ++ uint params; ++ #define PARAMS params ++#else ++ #define PARAMS (bd->bi_boot_params) ++#endif + void (*theKernel)(int zero, int arch, uint params); + + #ifdef CONFIG_CMDLINE_TAG +@@ -77,31 +83,40 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima + debug ("## Transferring control to Linux (at address %08lx) ...\n", + (ulong) theKernel); + ++#ifdef CONFIG_CHAINLOADER ++ s = getenv ("atags"); ++ if (s) { ++ params = simple_strtoul (s, NULL, 16); ++ printf ("Using existing atags at 0x%x\n", params); ++ } else { ++#endif + #if defined (CONFIG_SETUP_MEMORY_TAGS) || \ + defined (CONFIG_CMDLINE_TAG) || \ + defined (CONFIG_INITRD_TAG) || \ + defined (CONFIG_SERIAL_TAG) || \ + defined (CONFIG_REVISION_TAG) +- setup_start_tag (bd); ++ setup_start_tag (bd); + #ifdef CONFIG_SERIAL_TAG +- setup_serial_tag (¶ms); ++ setup_serial_tag (¶ms); + #endif + #ifdef CONFIG_REVISION_TAG +- setup_revision_tag (¶ms); ++ setup_revision_tag (¶ms); + #endif + #ifdef CONFIG_SETUP_MEMORY_TAGS +- setup_memory_tags (bd); ++ setup_memory_tags (bd); + #endif + #ifdef CONFIG_CMDLINE_TAG +- setup_commandline_tag (bd, commandline); ++ setup_commandline_tag (bd, commandline); + #endif + #ifdef CONFIG_INITRD_TAG +- if (images->rd_start && images->rd_end) +- setup_initrd_tag (bd, images->rd_start, images->rd_end); ++ if (images->rd_start && images->rd_end) ++ setup_initrd_tag (bd, images->rd_start, images->rd_end); + #endif +- setup_end_tag (bd); ++ setup_end_tag (bd); ++#endif ++#ifdef CONFIG_CHAINLOADER ++ } + #endif +- + /* we assume that the kernel is in place */ + printf ("\nStarting kernel ...\n\n"); + +@@ -114,7 +129,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima + + cleanup_before_linux (); + +- theKernel (0, machid, bd->bi_boot_params); ++ theKernel (0, machid, PARAMS); + /* does not return */ + + return 1; +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0003-Store-existing-atags-at-startup-if-chainloading.patch b/recipes/u-boot/u-boot-git/nokia900/0003-Store-existing-atags-at-startup-if-chainloading.patch new file mode 100644 index 0000000000..42317157a0 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0003-Store-existing-atags-at-startup-if-chainloading.patch @@ -0,0 +1,45 @@ +From f84df2f55ac133d9ff4cbc14d0eff812ee891b38 Mon Sep 17 00:00:00 2001 +From: Alistair Buxton +Date: Wed, 1 Sep 2010 23:04:03 +0100 +Subject: [PATCH 3/9] Store existing atags at startup if chainloading. + +This patch stores the values in r1 and r2 at startup. It also stores the address +which u-boot was originally loaded to. This is useful if you feed some other +bootloader a u-boot.bin instead of the linux kernel it was expecting. It is +rather ugly because it stores these values in an arbitrary memory address. + +Signed-off-by: Alistair Buxton +--- + arch/arm/cpu/armv7/start.S | 16 ++++++++++++++++ + 1 files changed, 16 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S +index 1e0a150..bdea26c 100644 +--- a/arch/arm/cpu/armv7/start.S ++++ b/arch/arm/cpu/armv7/start.S +@@ -100,6 +100,22 @@ FIQ_STACK_START: + */ + + reset: ++#if (CONFIG_CHAINLOADER) ++ /* ++ * Ugly hack: store the u-boot load address and kernel params ++ * 0x82000004: address where this image was loaded ++ * 0x82000008: mach_type ++ * 0x8200000c: atags address ++ */ ++ adr r0, _start ++ mov r3, #0x82000000 ++ add r3, r3, #4 ++ str r0, [r3] ++ add r3, r3, #4 ++ str r1, [r3] ++ add r3, r3, #4 ++ str r2, [r3] ++#endif + /* + * set the cpu to SVC32 mode + */ +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0004-Nokia-RX-51-aka-N900-support.patch b/recipes/u-boot/u-boot-git/nokia900/0004-Nokia-RX-51-aka-N900-support.patch new file mode 100644 index 0000000000..e357df717d --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0004-Nokia-RX-51-aka-N900-support.patch @@ -0,0 +1,1130 @@ +From b01c195db0ea0b66f8382ff09472d9904bcaf461 Mon Sep 17 00:00:00 2001 +From: Alistair Buxton +Date: Mon, 6 Sep 2010 03:01:34 +0100 +Subject: [PATCH 4/9] Nokia RX-51 aka N900 support + +This board definition results in a u-boot.bin which can be chainloaded +from NOLO in qemu or on a real N900. It does very little hardware config +because NOLO has already configured the board. + +NOLO is expecting a kernel image and will treat any image it finds in +onenand as such. This u-boot is intended to be flashed to the N900 like +a kernel. In order to transparently boot the original kernel, it will be +appended to u-boot.bin at 0x40000. NOLO will load the entire image into +memory and execute u-boot, which saves the ATAGs set by NOLO. Then the +bootscripts will attempt to load uImage or boot.scr from a fat filesystem +on MMC1 partition 3. If this fails, the appended kernel image will be +booted using the stored ATAGs. + +There is also support for framebuffer and the N900 keyboard. USB tty +works but is disabled because it prevents the current Maemo kernel from +booting. + +Signed-off-by: Alistair Buxton +--- + board/nokia/rx51/Makefile | 49 ++++++ + board/nokia/rx51/config.mk | 33 ++++ + board/nokia/rx51/rx51.c | 255 ++++++++++++++++++++++++++++ + board/nokia/rx51/rx51.h | 382 ++++++++++++++++++++++++++++++++++++++++++ + boards.cfg | 1 + + include/configs/nokia_rx51.h | 329 ++++++++++++++++++++++++++++++++++++ + 6 files changed, 1049 insertions(+), 0 deletions(-) + create mode 100644 board/nokia/rx51/Makefile + create mode 100644 board/nokia/rx51/config.mk + create mode 100644 board/nokia/rx51/rx51.c + create mode 100644 board/nokia/rx51/rx51.h + create mode 100644 include/configs/nokia_rx51.h + +diff --git a/board/nokia/rx51/Makefile b/board/nokia/rx51/Makefile +new file mode 100644 +index 0000000..31ad6fd +--- /dev/null ++++ b/board/nokia/rx51/Makefile +@@ -0,0 +1,49 @@ ++# ++# (C) Copyright 2000, 2001, 2002 ++# Wolfgang Denk, DENX Software Engineering, wd@denx.de. ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++include $(TOPDIR)/config.mk ++ ++LIB = $(obj)lib$(BOARD).a ++ ++COBJS := rx51.o ++ ++SRCS := $(COBJS:.o=.c) ++OBJS := $(addprefix $(obj),$(COBJS)) ++ ++$(LIB): $(obj).depend $(OBJS) ++ $(AR) $(ARFLAGS) $@ $(OBJS) ++ ++clean: ++ rm -f $(OBJS) ++ ++distclean: clean ++ rm -f $(LIB) core *.bak $(obj).depend ++ ++######################################################################### ++ ++# defines $(obj).depend target ++include $(SRCTREE)/rules.mk ++ ++sinclude $(obj).depend ++ ++######################################################################### +diff --git a/board/nokia/rx51/config.mk b/board/nokia/rx51/config.mk +new file mode 100644 +index 0000000..6c81a34 +--- /dev/null ++++ b/board/nokia/rx51/config.mk +@@ -0,0 +1,33 @@ ++# ++# (C) Copyright 2006 ++# Texas Instruments, ++# ++# Nokia N900 uses OMAP3 (ARM-CortexA8) cpu ++# see http://www.ti.com/ for more information on Texas Instruments ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++# Physical Address: ++# 8000'0000 (bank0) ++# 8800/0000 (bank1) ++# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 ++# (mem base + reserved) ++ ++# For use with external or internal boots. ++TEXT_BASE = 0x80e80000 +diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c +new file mode 100644 +index 0000000..3149a79 +--- /dev/null ++++ b/board/nokia/rx51/rx51.c +@@ -0,0 +1,255 @@ ++/* ++ * (C) Copyright 2010 ++ * Alistair Buxton ++ * ++ * Derived from Beagle Board and 3430 SDP code: ++ * (C) Copyright 2004-2008 ++ * Texas Instruments, ++ * ++ * Author : ++ * Sunil Kumar ++ * Shashi Ranjan ++ * ++ * Richard Woodruff ++ * Syed Mohammed Khasim ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rx51.h" ++ ++GraphicDevice gdev; ++ ++/* ++ * Routine: board_init ++ * Description: Early hardware init. ++ */ ++int board_init(void) ++{ ++ DECLARE_GLOBAL_DATA_PTR; ++ ++ gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ ++ /* board id for Linux */ ++ gd->bd->bi_arch_number = MACH_TYPE_NOKIA_RX51; ++ /* boot param addr */ ++ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); ++ ++ return 0; ++} ++ ++/* ++ * Routine: video_hw_init ++ * Description: Set up the GraphicDevice depending on sys_boot. ++ */ ++void *video_hw_init(void) ++{ ++ /* fill in Graphic Device */ ++ gdev.frameAdrs = 0x8f9c0000; ++ gdev.winSizeX = 800; ++ gdev.winSizeY = 480; ++ /* check sys_boot */ ++ if (readw(0x480022f0)&0xf) { /* in qemu */ ++ gdev.gdfBytesPP = 4; ++ gdev.gdfIndex = GDF_32BIT_X888RGB; ++ memset((void *)gdev.frameAdrs, 0, 0x177000); ++ } else { /* real hardware */ ++ gdev.gdfBytesPP = 2; ++ gdev.gdfIndex = GDF_16BIT_565RGB; ++ memset((void *)gdev.frameAdrs, 0, 0xbb800); ++ } ++ ++ return (void *) &gdev; ++} ++ ++/* ++ * Routine: misc_init_r ++ * Description: Configure board specific parts ++ */ ++int misc_init_r(void) ++{ ++#ifdef CONFIG_CHAINLOADER ++ char buf[12]; ++ printf("Getting NOLO supplied boot parameters...\n"); ++ sprintf(buf, "0x%x", readl(0x82000004)); ++ setenv("nolo_loadaddr", buf); ++ sprintf(buf, "0x%x", readl(0x82000004)+0x40000); ++ setenv("nolo_kernaddr", buf); ++ sprintf(buf, "0x%x", readl(0x82000008)); ++ setenv("nolo_machtype", buf); ++ sprintf(buf, "0x%x", readl(0x8200000c)); ++ setenv("nolo_atagaddr", buf); ++#endif ++ ++ dieid_num_r(); ++ ++ return 0; ++} ++ ++/* ++ * Routine: set_muxconf_regs ++ * Description: Setting up the configuration Mux registers specific to the ++ * hardware. Many pins need to be moved from protect to primary ++ * mode. ++ */ ++void set_muxconf_regs(void) ++{ ++ MUX_RX51(); ++} ++ ++/* ++ * TWL4030 keypad handler for cfb_console ++ */ ++ ++char keymap[] = { ++ /* normal */ ++ 'q', 'o', 'p', ',', '\b', 0, 'a', 's', ++ 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ++ 'e', '.', 0, '\r', 0, 'z', 'x', 'c', ++ 'r', 'v', 'b', 'n', 'm', ' ', 0, 0, ++ 't', 0, 0, 0, 0, 0, 0, 0, ++ 'y', 0, 0, 0, 0, 0, 0, 0, ++ 'u', 0, 0, 0, 0, 0, 0, 0, ++ 'i', 0, 0, 0, 0, 0, 0, 0, ++ /* fn */ ++ '1', '9', '0', '=', '\b', 0, '*', '+', ++ '2', '#', '-', '_', '(', ')', '&', '!', ++ '3', '?', 0, '\r', 0, 0, '$', 0, ++ '4', '/', '\\', '"', '\'', '@', 0, 0, ++ '5', 0, 0, 0, 0, 0, 0, 0, ++ '6', 0, 0, 0, 0, 0, 0, 0, ++ '7', 0, 0, 0, 0, 0, 0, 0, ++ '8', 0, 0, 0, 0, 0, 0, 0, ++}; ++ ++u8 keys[8]; ++u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0}; ++#define KEYBUF_SIZE 4 ++u8 keybuf[KEYBUF_SIZE]; ++u8 keybuf_head = 0, keybuf_tail = 0; ++ ++int rx51_kp_init(void) ++{ ++ int ret = 0; ++ u8 ctrl; ++ ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD, &ctrl, ++ TWL4030_KEYPAD_KEYP_CTRL_REG); ++ ++ if (!ret) { ++ /* turn on keyboard and use hardware scanning */ ++ ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON; ++ ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST; ++ ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN; ++ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, ctrl, ++ TWL4030_KEYPAD_KEYP_CTRL_REG); ++ /* enable key event status */ ++ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0xfe, ++ TWL4030_KEYPAD_KEYP_IMR1); ++ /* using the second interrupt event breaks meamo pr1.2 kernel */ ++ /*ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0xfe, ++ TWL4030_KEYPAD_KEYP_IMR2);*/ ++ /* enable missed event tracking */ ++ /*ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x20, ++ TWL4030_KEYPAD_KEYP_SMS);*/ ++ /* enable interrupt generation on rising and falling */ ++ /* this is a workaround for qemu twl4030 emulation */ ++ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x57, ++ TWL4030_KEYPAD_KEYP_EDR); ++ /* enable ISR clear on read */ ++ ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD, 0x05, ++ TWL4030_KEYPAD_KEYP_SIH_CTRL); ++ } ++ return ret; ++} ++ ++char rx51_kp_fill(u8 k, u8 mods) ++{ ++ if (mods & 2) { /* fn */ ++ k = keymap[k+64]; ++ } else { ++ k = keymap[k]; ++ if (mods & 4) { /* shift */ ++ if (k >= 'a' && k <= 'z') ++ k += 'A' - 'a'; ++ else if (k == '.') ++ k = ':'; ++ else if (k == ',') ++ k = ';'; ++ } ++ } ++ keybuf[keybuf_tail++] = k; ++ keybuf_tail %= KEYBUF_SIZE; ++} ++ ++int rx51_kp_tstc(void) ++{ ++ u8 c, r, dk, k, i; ++ u8 intr; ++ u8 mods; ++ ++ /* twl4030 remembers up to 2 events */ ++ for (i = 0; i < 2; i++) { ++ ++ /* check interrupt register for events */ ++ twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD, &intr, ++ TWL4030_KEYPAD_KEYP_ISR1+(2*i)); ++ ++ if (intr&1) { /* got an event */ ++ ++ /* read the key state */ ++ i2c_read(TWL4030_CHIP_KEYPAD, ++ TWL4030_KEYPAD_FULL_CODE_7_0, 1, keys, 8); ++ ++ /* cut out modifier keys from the keystate */ ++ mods = keys[4] >> 4; ++ keys[4] &= 0x0f; ++ ++ for (c = 0; c < 8; c++) { ++ ++ /* get newly pressed keys only */ ++ dk = ((keys[c] ^ old_keys[c])&keys[c]); ++ old_keys[c] = keys[c]; ++ ++ /* fill the keybuf */ ++ for (r = 0; r < 8; r++) { ++ if (dk&1) ++ rx51_kp_fill((c*8)+r, mods); ++ dk = dk >> 1; ++ } ++ } ++ } ++ } ++ return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE; ++} ++ ++int rx51_kp_getc(void) ++{ ++ keybuf_head %= KEYBUF_SIZE; ++ while (!rx51_kp_tstc()) ++ ; ++ return keybuf[keybuf_head++]; ++} ++ +diff --git a/board/nokia/rx51/rx51.h b/board/nokia/rx51/rx51.h +new file mode 100644 +index 0000000..625129c +--- /dev/null ++++ b/board/nokia/rx51/rx51.h +@@ -0,0 +1,382 @@ ++/* ++ * (C) Copyright 2008 ++ * Dirk Behme ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#ifndef _RX51_H_ ++#define _RX51_H_ ++ ++const omap3_sysinfo sysinfo = { ++ DDR_STACKED, ++ "OMAP3 RX-51", ++#if defined(CONFIG_ENV_IS_IN_ONENAND) ++ "OneNAND", ++#else ++ "NAND", ++#endif ++}; ++ ++/* ++ * IEN - Input Enable ++ * IDIS - Input Disable ++ * PTD - Pull type Down ++ * PTU - Pull type Up ++ * DIS - Pull type selection is inactive ++ * EN - Pull type selection is active ++ * M0 - Mode 0 ++ * The commented string gives the final mux configuration for that pin ++ */ ++#define MUX_RX51() \ ++ /*SDRC*/\ ++ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\ ++ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\ ++ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\ ++ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\ ++ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\ ++ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\ ++ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\ ++ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\ ++ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\ ++ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\ ++ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\ ++ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\ ++ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\ ++ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\ ++ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /*SDRC_D14*/\ ++ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /*SDRC_D15*/\ ++ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /*SDRC_D16*/\ ++ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /*SDRC_D17*/\ ++ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /*SDRC_D18*/\ ++ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /*SDRC_D19*/\ ++ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /*SDRC_D20*/\ ++ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /*SDRC_D21*/\ ++ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /*SDRC_D22*/\ ++ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /*SDRC_D23*/\ ++ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /*SDRC_D24*/\ ++ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /*SDRC_D25*/\ ++ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /*SDRC_D26*/\ ++ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /*SDRC_D27*/\ ++ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /*SDRC_D28*/\ ++ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /*SDRC_D29*/\ ++ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /*SDRC_D30*/\ ++ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /*SDRC_D31*/\ ++ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /*SDRC_CLK*/\ ++ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /*SDRC_DQS0*/\ ++ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /*SDRC_DQS1*/\ ++ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\ ++ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\ ++ /*GPMC*/\ ++ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\ ++ MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /*GPMC_A2*/\ ++ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /*GPMC_A3*/\ ++ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /*GPMC_A4*/\ ++ MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /*GPMC_A5*/\ ++ MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /*GPMC_A6*/\ ++ MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /*GPMC_A7*/\ ++ MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /*GPMC_A8*/\ ++ MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /*GPMC_A9*/\ ++ MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\ ++ MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /*GPMC_D0*/\ ++ MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /*GPMC_D1*/\ ++ MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /*GPMC_D2*/\ ++ MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /*GPMC_D3*/\ ++ MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /*GPMC_D4*/\ ++ MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /*GPMC_D5*/\ ++ MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /*GPMC_D6*/\ ++ MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /*GPMC_D7*/\ ++ MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /*GPMC_D8*/\ ++ MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /*GPMC_D9*/\ ++ MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /*GPMC_D10*/\ ++ MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /*GPMC_D11*/\ ++ MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /*GPMC_D12*/\ ++ MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /*GPMC_D13*/\ ++ MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /*GPMC_D14*/\ ++ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /*GPMC_D15*/\ ++ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\ ++ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\ ++ MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\ ++ MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /*GPMC_nCS3*/\ ++ MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\ ++ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/\ ++ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M1)) /*SYS_nDMA_REQ2*/\ ++ MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M1)) /*SYS_nDMA_REQ3*/\ ++ MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nBE1*/\ ++ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_WAIT2*/\ ++ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_WAIT3*/\ ++ MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /*GPMC_CLK*/\ ++ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\ ++ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\ ++ MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\ ++ MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\ ++ MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ ++ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ ++ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ ++ /*DSS*/\ ++ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ ++ MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\ ++ MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\ ++ MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\ ++ MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\ ++ MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\ ++ MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\ ++ MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\ ++ MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\ ++ MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\ ++ MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\ ++ MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\ ++ MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\ ++ MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\ ++ MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\ ++ MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\ ++ MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\ ++ MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\ ++ MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\ ++ MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\ ++ MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\ ++ MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\ ++ MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\ ++ MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\ ++ MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\ ++ MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\ ++ MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\ ++ MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\ ++ /*CAMERA*/\ ++ MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) /*CAM_HS */\ ++ MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) /*CAM_VS */\ ++ MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\ ++ MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) /*CAM_PCLK*/\ ++ MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ ++ MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\ ++ MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\ ++ MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\ ++ MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) /*CAM_D3*/\ ++ MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) /*CAM_D4*/\ ++ MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) /*CAM_D5*/\ ++ MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) /*CAM_D6*/\ ++ MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) /*CAM_D7*/\ ++ MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) /*CAM_D8*/\ ++ MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\ ++ MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\ ++ MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\ ++ MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\ ++ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ ++ MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ ++ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ ++ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ ++ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ ++ MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) /*CSI2_DY1*/\ ++ /*Audio Interface */\ ++ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ ++ MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) /*McBSP2_CLKX*/\ ++ MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ ++ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ ++ /*Expansion card */\ ++ MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ ++ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ ++ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ ++ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ ++ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)) /*MMC1_DAT2*/\ ++ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)) /*MMC1_DAT3*/\ ++ MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)) /*MMC1_DAT4*/\ ++ MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)) /*MMC1_DAT5*/\ ++ MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)) /*MMC1_DAT6*/\ ++ MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)) /*MMC1_DAT7*/\ ++ /*Wireless LAN */\ ++ MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M4)) /*GPIO_130*/\ ++ MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M4)) /*GPIO_131*/\ ++ MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132*/\ ++ MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133*/\ ++ MUX_VAL(CP(MMC2_DAT2), (IEN | PTU | EN | M4)) /*GPIO_134*/\ ++ MUX_VAL(CP(MMC2_DAT3), (IEN | PTU | EN | M4)) /*GPIO_135*/\ ++ MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M4)) /*GPIO_136*/\ ++ MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137*/\ ++ MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M4)) /*GPIO_138*/\ ++ MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139*/\ ++ /*Bluetooth*/\ ++ MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M1)) /*UART2_CTS*/\ ++ MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ ++ MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ ++ MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ ++ MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144*/\ ++ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ ++ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ ++ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ ++ /*Modem Interface */\ ++ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ ++ MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_149*/ \ ++ MUX_VAL(CP(UART1_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_150*/ \ ++ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\ ++ MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M1)) /*SSI1_DAT_RX*/\ ++ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M1)) /*SSI1_FLAG_RX*/\ ++ MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M1)) /*SSI1_RDY_RX*/\ ++ MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M1)) /*SSI1_WAKE*/\ ++ MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTD | DIS | M4)) /*GPIO_156*/\ ++ MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M4)) /*GPIO_157*/\ ++ MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M4)) /*GPIO_158*/\ ++ MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | DIS | M4)) /*GPIO_159*/\ ++ MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS*/\ ++ MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_161*/\ ++ MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_162*/\ ++ /*Serial Interface*/\ ++ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX*/\ ++ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*UART3_RTS_SD */\ ++ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) /*UART3_RX_IRRX*/\ ++ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*UART3_TX_IRTX*/\ ++ MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) /*HSUSB0_CLK*/\ ++ MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) /*HSUSB0_STP*/\ ++ MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) /*HSUSB0_DIR*/\ ++ MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) /*HSUSB0_NXT*/\ ++ MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA0*/\ ++ MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA1*/\ ++ MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA2*/\ ++ MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA3*/\ ++ MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA4*/\ ++ MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA5*/\ ++ MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA6*/\ ++ MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) /*HSUSB0_DATA7*/\ ++ MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) /*I2C1_SCL*/\ ++ MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) /*I2C1_SDA*/\ ++ MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M4)) /*GPIO_168*/\ ++ MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M4)) /*GPIO_183*/\ ++ MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) /*I2C3_SCL*/\ ++ MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\ ++ MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\ ++ MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\ ++ MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*GPIO_170*/\ ++ MUX_VAL(CP(MCSPI1_CLK), (IEN | PTU | EN | M4)) /*GPIO_171*/\ ++ MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTU | EN | M4)) /*GPIO_172*/\ ++ MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI*/\ ++ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ ++ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ ++ MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\ ++ /* USB EHCI (port 2) */\ ++ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA2*/\ ++ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA7*/\ ++ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA4*/\ ++ MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA5*/\ ++ MUX_VAL(CP(MCSPI2_CS0), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA6*/\ ++ MUX_VAL(CP(MCSPI2_CS1), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA3*/\ ++ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB2_CLK*/\ ++ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB2_STP*/\ ++ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DIR*/\ ++ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_NXT*/\ ++ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA0*/\ ++ MUX_VAL(CP(ETK_D15_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DATA1*/\ ++ /*Control and debug */\ ++ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\ ++ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\ ++ MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) /*SYS_nIRQ*/\ ++ MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ ++ MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3*/\ ++ MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4 - MMC1_WP*/\ ++ MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ ++ MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ ++ MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ ++ MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/ \ ++ MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ ++ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ ++ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ ++ MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_STP*/\ ++ MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB1_CLK*/\ ++ MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA0*/\ ++ MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA1*/\ ++ MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA2*/\ ++ MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA7*/\ ++ MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA4*/\ ++ MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA5*/\ ++ MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA6*/\ ++ MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA3*/\ ++ MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DIR*/\ ++ MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_NXT*/\ ++ MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\ ++ MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\ ++ MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)) /*d2d_mcad3*/\ ++ MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)) /*d2d_mcad4*/\ ++ MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)) /*d2d_mcad5*/\ ++ MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)) /*d2d_mcad6*/\ ++ MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)) /*d2d_mcad7*/\ ++ MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)) /*d2d_mcad8*/\ ++ MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)) /*d2d_mcad9*/\ ++ MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)) /*d2d_mcad10*/\ ++ MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)) /*d2d_mcad11*/\ ++ MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)) /*d2d_mcad12*/\ ++ MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)) /*d2d_mcad13*/\ ++ MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)) /*d2d_mcad14*/\ ++ MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)) /*d2d_mcad15*/\ ++ MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)) /*d2d_mcad16*/\ ++ MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)) /*d2d_mcad17*/\ ++ MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)) /*d2d_mcad18*/\ ++ MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)) /*d2d_mcad19*/\ ++ MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)) /*d2d_mcad20*/\ ++ MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)) /*d2d_mcad21*/\ ++ MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)) /*d2d_mcad22*/\ ++ MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)) /*d2d_mcad23*/\ ++ MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)) /*d2d_mcad24*/\ ++ MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)) /*d2d_mcad25*/\ ++ MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)) /*d2d_mcad26*/\ ++ MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)) /*d2d_mcad27*/\ ++ MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)) /*d2d_mcad28*/\ ++ MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)) /*d2d_mcad29*/\ ++ MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)) /*d2d_mcad30*/\ ++ MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)) /*d2d_mcad31*/\ ++ MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)) /*d2d_mcad32*/\ ++ MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)) /*d2d_mcad33*/\ ++ MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)) /*d2d_mcad34*/\ ++ MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)) /*d2d_mcad35*/\ ++ MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)) /*d2d_mcad36*/\ ++ MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)) /*d2d_clk26mi*/\ ++ MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)) /*d2d_nrespwron*/\ ++ MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)) /*d2d_nreswarm */\ ++ MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)) /*d2d_arm9nirq */\ ++ MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)) /*d2d_uma2p6fiq*/\ ++ MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)) /*d2d_spint*/\ ++ MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\ ++ MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\ ++ MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\ ++ MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\ ++ MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\ ++ MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\ ++ MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\ ++ MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\ ++ MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\ ++ MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\ ++ MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\ ++ MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\ ++ MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\ ++ MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\ ++ MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\ ++ MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\ ++ MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\ ++ MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\ ++ MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\ ++ MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ ++ MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ ++ MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ ++ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ ++ ++#define MUX_RX51_C() \ ++ MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\ ++ MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M4)) /*GPIO_142*/\ ++ MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M4)) /*GPIO_141*/\ ++ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) /*UART2_CTS*/\ ++ MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) /*UART2_RTS*/\ ++ MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/ ++ ++#endif +diff --git a/boards.cfg b/boards.cfg +index 69c6897..1a65ae6 100644 +--- a/boards.cfg ++++ b/boards.cfg +@@ -265,6 +265,7 @@ omap4_panda arm armv7 panda ti omap4 + omap4_sdp4430 arm armv7 sdp4430 ti omap4 + am3517_evm arm armv7 am3517evm logicpd omap3 + devkit8000 arm armv7 devkit8000 timll omap3 ++nokia_rx51 arm armv7 rx51 nokia omap3 + s5p_goni arm armv7 goni samsung s5pc1xx + smdkc100 arm armv7 smdkc100 samsung s5pc1xx + ixdpg425 arm ixp +diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h +new file mode 100644 +index 0000000..45b942a +--- /dev/null ++++ b/include/configs/nokia_rx51.h +@@ -0,0 +1,329 @@ ++/* ++ * (C) Copyright 2010 ++ * Alistair Buxton ++ * ++ * Derived from Beagle Board code: ++ * (C) Copyright 2006-2008 ++ * Texas Instruments. ++ * Richard Woodruff ++ * Syed Mohammed Khasim ++ * ++ * Configuration settings for the Nokia RX-51 aka N900. ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++/* ++ * High Level Configuration Options ++ */ ++#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ ++#define CONFIG_OMAP 1 /* in a TI OMAP core */ ++#define CONFIG_OMAP34XX 1 /* which is a 34XX */ ++#define CONFIG_OMAP3430 1 /* which is in a 3430 */ ++#define CONFIG_OMAP3_RX51 1 /* working with RX51 */ ++#define CONFIG_CHAINLOADER 1 /* Loaded by NOLO */ ++ ++#define CONFIG_SDRC /* The chip has SDRC controller */ ++ ++#include /* get chip and board defs */ ++#include ++ ++/* ++ * Display CPU and Board information ++ */ ++#define CONFIG_DISPLAY_CPUINFO 1 ++#define CONFIG_DISPLAY_BOARDINFO 1 ++ ++/* Clock Defines */ ++#define V_OSCK 26000000 /* Clock output from T2 */ ++#define V_SCLK (V_OSCK >> 1) ++ ++#undef CONFIG_USE_IRQ /* no support for IRQs */ ++#define CONFIG_MISC_INIT_R ++#define CONFIG_SKIP_LOWLEVEL_INIT /* NOLO set everything up */ ++ ++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ ++#define CONFIG_SETUP_MEMORY_TAGS 1 ++#define CONFIG_INITRD_TAG 1 ++#define CONFIG_REVISION_TAG 1 ++ ++/* ++ * Size of malloc() pool ++ */ ++#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ ++ /* Sector */ ++#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) ++#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ ++ /* initial data */ ++ ++/* ++ * Hardware drivers ++ */ ++ ++/* ++ * NS16550 Configuration ++ */ ++#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ ++ ++#define CONFIG_SYS_NS16550 ++#define CONFIG_SYS_NS16550_SERIAL ++#define CONFIG_SYS_NS16550_REG_SIZE (-4) ++#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK ++ ++/* ++ * select serial console configuration ++ */ ++#define CONFIG_CONS_INDEX 3 ++#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 ++#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */ ++ ++/* allow to overwrite serial and ethaddr */ ++#define CONFIG_ENV_OVERWRITE ++#define CONFIG_BAUDRATE 115200 ++#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ ++ 115200} ++#define CONFIG_MMC 1 ++#define CONFIG_OMAP3_MMC 1 ++#define CONFIG_DOS_PARTITION 1 ++ ++/* DDR - I use Micron DDR */ ++#define CONFIG_OMAP3_MICRON_DDR 1 ++ ++/* USB - broken */ ++#define CONFIG_MUSB_UDC 1 ++#define CONFIG_USB_OMAP3 1 ++#define CONFIG_TWL4030_USB 1 ++ ++/* USB device configuration - broken */ ++#define CONFIG_USB_DEVICE 1 ++/* FIXME: usbtty breaks maemo pr1.2 kernel booting ++#define CONFIG_USB_TTY 1 ++*/ ++#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 ++ ++/* commands to include */ ++#include ++ ++#define CONFIG_CMD_EXT2 /* EXT2 Support */ ++#define CONFIG_CMD_FAT /* FAT support */ ++ ++#define CONFIG_CMD_I2C /* I2C serial bus support */ ++#define CONFIG_CMD_MMC /* MMC support */ ++#define CONFIG_CMD_ONENAND /* NAND support */ ++ ++#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ ++#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ ++#undef CONFIG_CMD_IMI /* iminfo */ ++#undef CONFIG_CMD_IMLS /* List all found images */ ++#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ ++#undef CONFIG_CMD_NFS /* NFS support */ ++ ++#define CONFIG_SYS_NO_FLASH ++#define CONFIG_HARD_I2C 1 ++#define CONFIG_SYS_I2C_SPEED 100000 ++#define CONFIG_SYS_I2C_SLAVE 1 ++#define CONFIG_SYS_I2C_BUS 0 ++#define CONFIG_SYS_I2C_BUS_SELECT 1 ++#define CONFIG_DRIVER_OMAP34XX_I2C 1 ++ ++/* ++ * TWL4030 ++ */ ++#define CONFIG_TWL4030_POWER 1 ++#define CONFIG_TWL4030_LED 1 ++#define CONFIG_TWL4030_KEYPAD 1 ++ ++/* ++ * Framebuffer ++ */ ++/* Video console */ ++#define CONFIG_VIDEO ++#define CONFIG_CFB_CONSOLE ++#define CONFIG_VIDEO_LOGO ++#define VIDEO_FB_16BPP_PIXEL_SWAP ++#define VIDEO_FB_16BPP_WORD_SWAP ++#define CONFIG_VIDEO_SW_CURSOR ++#define CONFIG_SPLASH_SCREEN ++ ++/* functions for cfb_console */ ++#define VIDEO_KBD_INIT_FCT rx51_kp_init() ++#define VIDEO_TSTC_FCT rx51_kp_tstc ++#define VIDEO_GETC_FCT rx51_kp_getc ++#ifndef __ASSEMBLY__ ++int rx51_kp_init(void); ++int rx51_kp_tstc(void); ++int rx51_kp_getc(void); ++#endif ++ ++/* Environment information */ ++#define CONFIG_BOOTDELAY 3 ++ ++#define CONFIG_EXTRA_ENV_SETTINGS \ ++ "usbtty=cdc_acm\0" \ ++ "stdin=vga\0stdout=vga\0stderr=vga\0" \ ++ "setcon=setenv stdin ${con};" \ ++ "setenv stdout ${con};" \ ++ "setenv stderr ${con}\0" \ ++ "sercon=setenv con serial; run setcon\0" \ ++ "usbcon=setenv con usbtty; run setcon\0" \ ++ "vgacon=setenv con vga; run setcon\0" \ ++ "loadaddr=0x82000000\0" \ ++ "meegoargs=setenv bootargs\0" \ ++ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ ++ "bootscript=echo Running bootscript from mmc ...; " \ ++ "source ${loadaddr}\0" \ ++ "loaduimage=fatload mmc 0:3 ${loadaddr} uImage\0" \ ++ "mmcboot=echo Booting from mmc ...; " \ ++ "run meegoargs; " \ ++ "bootm ${loadaddr}\0" \ ++ "noloboot=echo Booting NOLO supplied kernel ...; " \ ++ "setenv atags ${nolo_atagaddr};" \ ++ "bootm ${nolo_kernaddr}\0" ++ ++#define CONFIG_PREBOOT \ ++ "echo Extra commands:;" \ ++ "echo run sercon - Use serial port for control.;" \ ++ "echo run usbcon - Use usbtty for control.;" \ ++ "echo run vgacon - Use framebuffer/keyboard.;" \ ++ "echo run mmcboot - Boot from SD card slot.;" \ ++ "echo run noloboot - Boot kernel loaded by NOLO." ++ ++#define CONFIG_BOOTCOMMAND \ ++ "if mmc init; then " \ ++ "if run loadbootscript; then " \ ++ "run bootscript; " \ ++ "else " \ ++ "if run loaduimage; then " \ ++ "run mmcboot; " \ ++ "else run noloboot; " \ ++ "fi; " \ ++ "fi; " \ ++ "else run noloboot; fi" ++ ++#define CONFIG_AUTO_COMPLETE 1 ++/* ++ * Miscellaneous configurable options ++ */ ++#define CONFIG_SYS_LONGHELP /* undef to save memory */ ++#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ ++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " ++#define CONFIG_SYS_PROMPT "OMAP3 RX-51 # " ++#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ ++/* Print Buffer Size */ ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ ++ sizeof(CONFIG_SYS_PROMPT) + 16) ++#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ ++/* Boot Argument Buffer Size */ ++#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) ++ ++#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ ++ /* works on */ ++#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ ++ 0x01F00000) /* 31MB */ ++ ++#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ ++ /* load address */ ++ ++/* ++ * OMAP3 has 12 GP timers, they can be driven by the system clock ++ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). ++ * This rate is divided by a local divisor. ++ */ ++#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) ++#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ ++#define CONFIG_SYS_HZ 1000 ++ ++/*----------------------------------------------------------------------- ++ * Stack sizes ++ * ++ * The stack sizes are set up in start.S using the settings below ++ */ ++#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ ++#ifdef CONFIG_USE_IRQ ++#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ ++#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ ++#endif ++ ++/*----------------------------------------------------------------------- ++ * Physical Memory Map ++ */ ++#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ ++#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 ++#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ ++#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 ++ ++/* SDRAM Bank Allocation method */ ++#define SDRC_R_B_C 1 ++ ++/*----------------------------------------------------------------------- ++ * FLASH and environment organization ++ */ ++ ++/* **** PISMO SUPPORT *** */ ++ ++/* Configure the PISMO */ ++#define PISMO1_NAND_SIZE GPMC_SIZE_128M ++#define PISMO1_ONEN_SIZE GPMC_SIZE_128M ++ ++#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ ++ /* one chip */ ++#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ ++#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ ++ ++#define CONFIG_SYS_FLASH_BASE boot_flash_base ++ ++/* Monitor at start of flash */ ++#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE ++#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP ++ ++#define CONFIG_ENV_IS_IN_ONENAND 1 ++#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ ++#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ ++ ++#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec ++#define CONFIG_ENV_OFFSET boot_flash_off ++#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET ++ ++/*----------------------------------------------------------------------- ++ * CFI FLASH driver setup ++ */ ++/* timeout values are in ticks */ ++#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) ++#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) ++ ++/* Flash banks JFFS2 should use */ ++#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ ++ CONFIG_SYS_MAX_NAND_DEVICE) ++#define CONFIG_SYS_JFFS2_MEM_NAND ++/* use flash_info[2] */ ++#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS ++#define CONFIG_SYS_JFFS2_NUM_BANKS 1 ++ ++#ifndef __ASSEMBLY__ ++extern unsigned int boot_flash_base; ++extern volatile unsigned int boot_flash_env_addr; ++extern unsigned int boot_flash_off; ++extern unsigned int boot_flash_sec; ++extern unsigned int boot_flash_type; ++#endif ++ ++#endif /* __CONFIG_H */ +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0005-fix-loading-file-from-ext2-partition-on-OMAP3-evm.patch b/recipes/u-boot/u-boot-git/nokia900/0005-fix-loading-file-from-ext2-partition-on-OMAP3-evm.patch new file mode 100644 index 0000000000..e57c636261 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0005-fix-loading-file-from-ext2-partition-on-OMAP3-evm.patch @@ -0,0 +1,33 @@ +From 05f13bfcd6fcaec3a9372497c0d9e45592e2516f Mon Sep 17 00:00:00 2001 +From: Mickael LANOE +Date: Tue, 7 Dec 2010 11:42:49 +0100 +Subject: [PATCH 5/9] fix loading file from ext2 partition on OMAP3 evm + +* http://lists.denx.de/pipermail/u-boot/2010-June/072198.html + +Signed-off-by: Martin Jansa +--- + drivers/mmc/omap3_mmc.c | 7 ++++--- + 1 files changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c +index 9506cca..c5aaa6d 100644 +--- a/drivers/mmc/omap3_mmc.c ++++ b/drivers/mmc/omap3_mmc.c +@@ -544,9 +544,10 @@ unsigned char configure_mmc(mmc_card_data *mmc_card_cur) + unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt, + void *dst) + { +- omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data, +- (unsigned long *) dst); +- return 1; ++ if(omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data, ++ (unsigned long *) dst) != 1) ++ return 0; ++ return blkcnt; + } + + int mmc_legacy_init(int dev) +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0006-omap3_mmc.c-fix-formating.patch b/recipes/u-boot/u-boot-git/nokia900/0006-omap3_mmc.c-fix-formating.patch new file mode 100644 index 0000000000..3516ad3ffe --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0006-omap3_mmc.c-fix-formating.patch @@ -0,0 +1,28 @@ +From 229f5fc3cce7463a66574cff62f4941fa198e27c Mon Sep 17 00:00:00 2001 +From: Matan Ziv-Av +Date: Tue, 7 Dec 2010 11:56:05 +0100 +Subject: [PATCH 6/9] omap3_mmc.c: fix formating + +--- + drivers/mmc/omap3_mmc.c | 4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c +index c5aaa6d..9fdcc32 100644 +--- a/drivers/mmc/omap3_mmc.c ++++ b/drivers/mmc/omap3_mmc.c +@@ -544,9 +544,9 @@ unsigned char configure_mmc(mmc_card_data *mmc_card_cur) + unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt, + void *dst) + { +- if(omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data, ++ if (omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data, + (unsigned long *) dst) != 1) +- return 0; ++ return 0; + return blkcnt; + } + +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0007-Only-delay-boot-if-keyboard-open.patch b/recipes/u-boot/u-boot-git/nokia900/0007-Only-delay-boot-if-keyboard-open.patch new file mode 100644 index 0000000000..4ba9525064 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0007-Only-delay-boot-if-keyboard-open.patch @@ -0,0 +1,43 @@ +From 05c3efdd3116aa18d4cb1f2303aeb7660609f5f0 Mon Sep 17 00:00:00 2001 +From: Matan Ziv-Av +Date: Tue, 7 Dec 2010 12:01:34 +0100 +Subject: [PATCH 7/9] Only delay boot if keyboard open + +--- + board/nokia/rx51/rx51.c | 7 +++++++ + include/configs/nokia_rx51.h | 1 + + 2 files changed, 8 insertions(+), 0 deletions(-) + +diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c +index 3149a79..347d08a 100644 +--- a/board/nokia/rx51/rx51.c ++++ b/board/nokia/rx51/rx51.c +@@ -104,6 +104,13 @@ int misc_init_r(void) + setenv("nolo_atagaddr", buf); + #endif + ++ // set environment variable slide_sw ++ // if keyboard slide is open/close ++ omap_set_gpio_direction(71, 1); ++ unsigned val = omap_get_gpio_datain(71); ++ omap_free_gpio(71); ++ setenv("slide_sw", val ? "close" : "open"); ++ + dieid_num_r(); + + return 0; +diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h +index 45b942a..5c3b068 100644 +--- a/include/configs/nokia_rx51.h ++++ b/include/configs/nokia_rx51.h +@@ -200,6 +200,7 @@ int rx51_kp_getc(void); + "bootm ${nolo_kernaddr}\0" + + #define CONFIG_PREBOOT \ ++ "if test $slide_sw != open ; then run noloboot; fi ;" \ + "echo Extra commands:;" \ + "echo run sercon - Use serial port for control.;" \ + "echo run usbcon - Use usbtty for control.;" \ +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0008-configs-nokia_rx51.h-use-ext2-instead-of-fat-for-1st.patch b/recipes/u-boot/u-boot-git/nokia900/0008-configs-nokia_rx51.h-use-ext2-instead-of-fat-for-1st.patch new file mode 100644 index 0000000000..12835286dd --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0008-configs-nokia_rx51.h-use-ext2-instead-of-fat-for-1st.patch @@ -0,0 +1,30 @@ +From f7b7886a7000ae2a65255d29b51578cba223a99e Mon Sep 17 00:00:00 2001 +From: Martin Jansa +Date: Tue, 7 Dec 2010 12:41:39 +0100 +Subject: [PATCH 8/9] configs/nokia_rx51.h: use ext2 instead of fat for 1st and 3rd partition + +Signed-off-by: Martin Jansa +--- + include/configs/nokia_rx51.h | 4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h +index 5c3b068..57769d0 100644 +--- a/include/configs/nokia_rx51.h ++++ b/include/configs/nokia_rx51.h +@@ -188,10 +188,10 @@ int rx51_kp_getc(void); + "vgacon=setenv con vga; run setcon\0" \ + "loadaddr=0x82000000\0" \ + "meegoargs=setenv bootargs\0" \ +- "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ ++ "loadbootscript=ext2load mmc 0 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source ${loadaddr}\0" \ +- "loaduimage=fatload mmc 0:3 ${loadaddr} uImage\0" \ ++ "loaduimage=ext2load mmc 0:3 ${loadaddr} uImage\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run meegoargs; " \ + "bootm ${loadaddr}\0" \ +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0009-configs-nokia_rx51.h-integrate-SHR-boot.scr-to-defau.patch b/recipes/u-boot/u-boot-git/nokia900/0009-configs-nokia_rx51.h-integrate-SHR-boot.scr-to-defau.patch new file mode 100644 index 0000000000..1b121d9962 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0009-configs-nokia_rx51.h-integrate-SHR-boot.scr-to-defau.patch @@ -0,0 +1,90 @@ +From 68641f0dea622a6274337fcc1c14d1f176d3ea79 Mon Sep 17 00:00:00 2001 +From: Martin Jansa +Date: Tue, 7 Dec 2010 13:07:57 +0100 +Subject: [PATCH 9/9] configs/nokia_rx51.h: integrate SHR boot.scr to default env + +--- + include/configs/nokia_rx51.h | 50 +++++++++++++++++++++++++++++------------ + 1 files changed, 35 insertions(+), 15 deletions(-) + +diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h +index 57769d0..49412e7 100644 +--- a/include/configs/nokia_rx51.h ++++ b/include/configs/nokia_rx51.h +@@ -187,38 +187,58 @@ int rx51_kp_getc(void); + "usbcon=setenv con usbtty; run setcon\0" \ + "vgacon=setenv con vga; run setcon\0" \ + "loadaddr=0x82000000\0" \ +- "meegoargs=setenv bootargs\0" \ + "loadbootscript=ext2load mmc 0 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source ${loadaddr}\0" \ +- "loaduimage=ext2load mmc 0:3 ${loadaddr} uImage\0" \ +- "mmcboot=echo Booting from mmc ...; " \ +- "run meegoargs; " \ +- "bootm ${loadaddr}\0" \ +- "noloboot=echo Booting NOLO supplied kernel ...; " \ ++ "meegoargs=root=/dev/mmcblk0p3 rootwait console=tty0 omapfb.vram=0:2M,1:2M,2:2M mtdoops.mtddev=2 nosplash\0" \ ++ "shrargs=snd-soc-rx51.hp_lim=42 snd-soc-tlv320aic3x.hp_dac_lim=6 console=tty1 root=/dev/mmcblk1p2 rootwait panic=20 debug\0" \ ++ "shrcmd=ext2load mmc 0:1 0x82000000 uImage-shr; bootm 0x82000000\0" \ ++ "shr2cmd=ext2load mmc 0:1 0x82000000 uImage-shr2; bootm 0x82000000\0" \ ++ "meegocmd=ext2load mmc 0:1 0x82000000 uImage-meego; bootm 0x82000000\0" \ ++ "meego2cmd=ext2load mmc 0:1 0x82000000 uImage-meego2; bootm 0x82000000\0" \ ++ "meego=echo Booting Meego from 3nd partition on SD card ((uImage-meego) ...; " \ ++ "setenv atags ${nolo_atagaddr};" \ ++ "setenv bootargs ${meegoargs}; " \ ++ "setenv bootcmd ${meegocmd}; " \ ++ "boot\0" \ ++ "meego2=echo Booting Meego from 3nd partition on SD card ((uImage-meego2) ...; " \ ++ "setenv atags ${nolo_atagaddr};" \ ++ "setenv bootargs ${meegoargs}; " \ ++ "setenv bootcmd ${meego2cmd}; " \ ++ "boot\0" \ ++ "shr=echo Booting SHR from 2nd partition on SD card ((uImage-shr) ...; " \ ++ "setenv atags ${nolo_atagaddr};" \ ++ "setenv bootargs ${shrargs}; " \ ++ "setenv bootcmd ${shrcmd}; " \ ++ "boot\0" \ ++ "shr2=echo Booting SHR from 2nd partition on SD card ((uImage-shr2) ...; " \ ++ "setenv atags ${nolo_atagaddr};" \ ++ "setenv bootargs ${shrargs}; " \ ++ "setenv bootcmd ${shr2cmd}; " \ ++ "boot\0" \ ++ "maemo=echo Booting Maemo from eMMC, NOLO supplied kernel ...; " \ + "setenv atags ${nolo_atagaddr};" \ + "bootm ${nolo_kernaddr}\0" + + #define CONFIG_PREBOOT \ +- "if test $slide_sw != open ; then run noloboot; fi ;" \ ++ "if test $slide_sw != open ; then run maemo; fi ;" \ ++ "echo All uImage-* kernels and boot.scr are expected on ext2 mmc 0;" \ + "echo Extra commands:;" \ + "echo run sercon - Use serial port for control.;" \ + "echo run usbcon - Use usbtty for control.;" \ + "echo run vgacon - Use framebuffer/keyboard.;" \ +- "echo run mmcboot - Boot from SD card slot.;" \ +- "echo run noloboot - Boot kernel loaded by NOLO." ++ "echo run shr - Boot SHR from 2nd partition on SD card (uImage-shr).;" \ ++ "echo run shr2 - Boot SHR from 2nd partition on SD card (uImage-shr2).;" \ ++ "echo run meego - Boot Meego from 3nd partition on SD card (uImage-meego).;" \ ++ "echo run meego2 - Boot Meego from 3nd partition on SD card (uImage-meego2).;" \ ++ "echo run maemo - Boot Maemo from eMMC, kernel loaded by NOLO." + + #define CONFIG_BOOTCOMMAND \ + "if mmc init; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ +- "else " \ +- "if run loaduimage; then " \ +- "run mmcboot; " \ +- "else run noloboot; " \ +- "fi; " \ + "fi; " \ +- "else run noloboot; fi" ++ "else run maemo; fi" + + #define CONFIG_AUTO_COMPLETE 1 + /* +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0010-configs-nokia_rx51.h-call-mmc-init-manually-because-.patch b/recipes/u-boot/u-boot-git/nokia900/0010-configs-nokia_rx51.h-call-mmc-init-manually-because-.patch new file mode 100644 index 0000000000..4c967f7993 --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0010-configs-nokia_rx51.h-call-mmc-init-manually-because-.patch @@ -0,0 +1,37 @@ +From 8845d1ab756293f16c5eac7b4c575f73fe29726d Mon Sep 17 00:00:00 2001 +From: Martin Jansa +Date: Tue, 7 Dec 2010 15:46:08 +0100 +Subject: [PATCH 10/10] configs/nokia_rx51.h: call mmc init manually, because mmc init in CONFIG_BOOTCOMMAND is called only after timeout + +--- + include/configs/nokia_rx51.h | 10 +++++----- + 1 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h +index 49412e7..1031a8e 100644 +--- a/include/configs/nokia_rx51.h ++++ b/include/configs/nokia_rx51.h +@@ -187,15 +187,15 @@ int rx51_kp_getc(void); + "usbcon=setenv con usbtty; run setcon\0" \ + "vgacon=setenv con vga; run setcon\0" \ + "loadaddr=0x82000000\0" \ +- "loadbootscript=ext2load mmc 0 ${loadaddr} boot.scr\0" \ ++ "loadbootscript=mmc init; ext2load mmc 0 ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source ${loadaddr}\0" \ + "meegoargs=root=/dev/mmcblk0p3 rootwait console=tty0 omapfb.vram=0:2M,1:2M,2:2M mtdoops.mtddev=2 nosplash\0" \ + "shrargs=snd-soc-rx51.hp_lim=42 snd-soc-tlv320aic3x.hp_dac_lim=6 console=tty1 root=/dev/mmcblk1p2 rootwait panic=20 debug\0" \ +- "shrcmd=ext2load mmc 0:1 0x82000000 uImage-shr; bootm 0x82000000\0" \ +- "shr2cmd=ext2load mmc 0:1 0x82000000 uImage-shr2; bootm 0x82000000\0" \ +- "meegocmd=ext2load mmc 0:1 0x82000000 uImage-meego; bootm 0x82000000\0" \ +- "meego2cmd=ext2load mmc 0:1 0x82000000 uImage-meego2; bootm 0x82000000\0" \ ++ "shrcmd=mmc init; ext2load mmc 0:1 0x82000000 uImage-shr; bootm 0x82000000\0" \ ++ "shr2cmd=mmc init; ext2load mmc 0:1 0x82000000 uImage-shr2; bootm 0x82000000\0" \ ++ "meegocmd=mmc init; ext2load mmc 0:1 0x82000000 uImage-meego; bootm 0x82000000\0" \ ++ "meego2cmd=mmc init; ext2load mmc 0:1 0x82000000 uImage-meego2; bootm 0x82000000\0" \ + "meego=echo Booting Meego from 3nd partition on SD card ((uImage-meego) ...; " \ + "setenv atags ${nolo_atagaddr};" \ + "setenv bootargs ${meegoargs}; " \ +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot-git/nokia900/0011-configs-nokia_rx51.h-don-t-set-atags-when-booting-fr.patch b/recipes/u-boot/u-boot-git/nokia900/0011-configs-nokia_rx51.h-don-t-set-atags-when-booting-fr.patch new file mode 100644 index 0000000000..74e8d75cef --- /dev/null +++ b/recipes/u-boot/u-boot-git/nokia900/0011-configs-nokia_rx51.h-don-t-set-atags-when-booting-fr.patch @@ -0,0 +1,37 @@ +From 1b9f7d91fd173ef3beaf5afea761e5056c027577 Mon Sep 17 00:00:00 2001 +From: Martin Jansa +Date: Wed, 8 Dec 2010 09:20:33 +0100 +Subject: [PATCH 11/11] configs/nokia_rx51.h: don't set atags when booting from uSD except shr2 + +* overwrites supplied bootargs ie root= +* is needed only for old 2.6.28.10 kernel soundmodule checking revision + so keep for shr2 option +--- + include/configs/nokia_rx51.h | 3 --- + 1 files changed, 0 insertions(+), 3 deletions(-) + +diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h +index 1031a8e..f1858b4 100644 +--- a/include/configs/nokia_rx51.h ++++ b/include/configs/nokia_rx51.h +@@ -197,17 +197,14 @@ int rx51_kp_getc(void); + "meegocmd=mmc init; ext2load mmc 0:1 0x82000000 uImage-meego; bootm 0x82000000\0" \ + "meego2cmd=mmc init; ext2load mmc 0:1 0x82000000 uImage-meego2; bootm 0x82000000\0" \ + "meego=echo Booting Meego from 3nd partition on SD card ((uImage-meego) ...; " \ +- "setenv atags ${nolo_atagaddr};" \ + "setenv bootargs ${meegoargs}; " \ + "setenv bootcmd ${meegocmd}; " \ + "boot\0" \ + "meego2=echo Booting Meego from 3nd partition on SD card ((uImage-meego2) ...; " \ +- "setenv atags ${nolo_atagaddr};" \ + "setenv bootargs ${meegoargs}; " \ + "setenv bootcmd ${meego2cmd}; " \ + "boot\0" \ + "shr=echo Booting SHR from 2nd partition on SD card ((uImage-shr) ...; " \ +- "setenv atags ${nolo_atagaddr};" \ + "setenv bootargs ${shrargs}; " \ + "setenv bootcmd ${shrcmd}; " \ + "boot\0" \ +-- +1.7.3.2 + diff --git a/recipes/u-boot/u-boot_git.bb b/recipes/u-boot/u-boot_git.bb index d8c038b5d8..d9abc73215 100644 --- a/recipes/u-boot/u-boot_git.bb +++ b/recipes/u-boot/u-boot_git.bb @@ -17,6 +17,7 @@ SRCREV_mpc8641-hpcn = "f20393c5e787b3776c179d20f82a86bda124d651" SRCREV_p1020rdb = "f20393c5e787b3776c179d20f82a86bda124d651" SRCREV_p2020ds = "f20393c5e787b3776c179d20f82a86bda124d651" SRCREV_bug20 = "169a4c804dbaf11facb041b1333d394c6ceb8d68" +SRCREV_nokia900 = "bd2313078114c4b44c4a5ce149af43bcb7fc8854" SRC_URI_append_afeb9260 = " file://AFEB9260-network-fix.patch" SRC_URI_append_afeb9260-180 = " file://AFEB9260-network-fix.patch" SRC_URI_append_cm-t35 = "file://cm-t35/cm-t35.patch" @@ -355,3 +356,24 @@ if [ -d "${XILINX_BSP_PATH}" ]; then install ${S}/u-boot ${XILINX_BSP_PATH} fi } + +PV_nokia900 = "2010.06+gitr${SRCPV}" +SRC_URI_nokia900 = "git://www.denx.de/git/u-boot.git;protocol=git \ + file://0001-ARM-Avoid-compiler-optimization-for-usages-of-readb-.patch \ + file://0001-Reduce-delays-in-omap-i2c-driver.patch \ + file://0002-Make-bootm-optionally-use-pre-existing-atags-for-Lin.patch \ + file://0003-Store-existing-atags-at-startup-if-chainloading.patch \ + file://0004-Nokia-RX-51-aka-N900-support.patch \ + file://0001-nokia-rx51-use-O0-as-work-around-for-gcc-4.5.patch \ + file://0005-fix-loading-file-from-ext2-partition-on-OMAP3-evm.patch \ + file://0006-omap3_mmc.c-fix-formating.patch \ + file://0007-Only-delay-boot-if-keyboard-open.patch \ +" +SRC_URI_nokia900_append_shr = " \ + file://0008-configs-nokia_rx51.h-use-ext2-instead-of-fat-for-1st.patch \ + file://0009-configs-nokia_rx51.h-integrate-SHR-boot.scr-to-defau.patch \ + file://0010-configs-nokia_rx51.h-call-mmc-init-manually-because-.patch \ + file://0011-configs-nokia_rx51.h-don-t-set-atags-when-booting-fr.patch \ +" + +UBOOT_MACHINE_nokia900 = "nokia_rx51_config" -- cgit 1.2.3-korg