From ec3e66ef2e222feb0408f16a3498be1ea9b6a9c0 Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Mon, 10 May 2010 13:59:14 -0700 Subject: [PATCH 27/28] OMAP: DSS2: check for both cpu type and revision, rather than just revision --- drivers/video/omap2/dss/dispc.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index fa40fa5..133916a 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2101,7 +2101,7 @@ void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode) static bool _dispc_lcd_timings_ok(int hsw, int hfp, int hbp, int vsw, int vfp, int vbp) { - if (cpu_is_omap24xx() || omap_rev() < OMAP3430_REV_ES3_0) { + if (cpu_is_omap24xx() || (cpu_is_omap34xx() && omap_rev_lt_3_0())) { if (hsw < 1 || hsw > 64 || hfp < 1 || hfp > 256 || hbp < 1 || hbp > 256 || @@ -2134,7 +2134,7 @@ static void _dispc_set_lcd_timings(int hsw, int hfp, int hbp, { u32 timing_h, timing_v; - if (cpu_is_omap24xx() || omap_rev() < OMAP3430_REV_ES3_0) { + if (cpu_is_omap24xx() || (cpu_is_omap34xx() && omap_rev_lt_3_0())) { timing_h = FLD_VAL(hsw-1, 5, 0) | FLD_VAL(hfp-1, 15, 8) | FLD_VAL(hbp-1, 27, 20); -- 1.6.6.1