From e5f06830bc8d3ef4792c9c0569825d0347b39852 Mon Sep 17 00:00:00 2001 From: Ian Molton Date: Fri, 4 Jan 2008 18:43:31 +0000 Subject: [PATCH 10/64] OHCI driver for TMIO devices --- drivers/usb/Kconfig | 1 + drivers/usb/host/Kconfig | 1 + drivers/usb/host/ohci-hcd.c | 5 + drivers/usb/host/ohci-tmio.c | 369 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 376 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/host/ohci-tmio.c diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 7580aa5..8912042 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -36,6 +36,7 @@ config USB_ARCH_HAS_OHCI default y if ARCH_EP93XX default y if ARCH_AT91 default y if ARCH_PNX4008 + default y if MFD_TC6393XB # PPC: default y if STB03xxx default y if PPC_MPC52xx diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 49a91c5..5ae3589 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -101,6 +101,7 @@ config USB_OHCI_HCD depends on USB && USB_ARCH_HAS_OHCI select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 select I2C if ARCH_PNX4008 + select DMABOUNCE if MFD_TC6393XB ---help--- The Open Host Controller Interface (OHCI) is a standard for accessing USB 1.1 host controller hardware. It does more in hardware than Intel's diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index ecfe800..77abf3e 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -1043,6 +1043,11 @@ MODULE_LICENSE ("GPL"); #define PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver #endif +#ifdef CONFIG_MFD_TC6393XB +#include "ohci-tmio.c" +#define PLATFORM_DRIVER ohci_hcd_tmio_driver +#endif + #ifdef CONFIG_USB_OHCI_HCD_SSB #include "ohci-ssb.c" #define SSB_OHCI_DRIVER ssb_ohci_driver diff --git a/drivers/usb/host/ohci-tmio.c b/drivers/usb/host/ohci-tmio.c new file mode 100644 index 0000000..be609f3 --- /dev/null +++ b/drivers/usb/host/ohci-tmio.c @@ -0,0 +1,369 @@ +/* + * OHCI HCD(Host Controller Driver) for USB. + * + *(C) Copyright 1999 Roman Weissgaerber + *(C) Copyright 2000-2002 David Brownell + *(C) Copyright 2002 Hewlett-Packard Company + * + * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core + *(C) Copyright 2005 Chris Humbert + * + * This is known to work with the following variants: + * TC6393XB revision 3 (32kB SRAM) + * + * The TMIO's OHCI core DMAs through a small internal buffer that + * is directly addressable by the CPU. dma_declare_coherent_memory + * and DMA bounce buffers allow the higher-level OHCI host driver to + * work. However, the dma API doesn't handle dma mapping failures + * well(dma_sg_map() is a prime example), so it is unusable. + * + * This HC pretends be a PIO-ish controller and uses the kernel's + * generic allocator for the entire SRAM. Using the USB core's + * usb_operations, we provide hcd_buffer_alloc/free. Using the OHCI's + * ohci_ops, we provide memory management for OHCI's TDs and EDs. We + * internally queue a URB's TDs until enough dma memory is available + * to enqueue them with the HC. + * + * Written from sparse documentation from Toshiba and Sharp's driver + * for the 2.4 kernel, + * usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/*#include +#include +#include +#include +#include +#include */ +#include +#include +#include +#include + +/*-------------------------------------------------------------------------*/ + +/* + * USB Host Controller Configuration Register + */ +struct tmio_uhccr { + u8 x00[8]; + u8 revid; /* 0x08 Revision ID */ + u8 x01[7]; + u16 basel; /* 0x10 USB Control Register Base Address Low */ + u16 baseh; /* 0x12 USB Control Register Base Address High */ + u8 x02[0x2c]; + u8 ilme; /* 0x40 Internal Local Memory Enable */ + u8 x03[0x0b]; + u16 pm; /* 0x4c Power Management */ + u8 x04[2]; + u8 intc; /* 0x50 INT Control */ + u8 x05[3]; + u16 lmw1l; /* 0x54 Local Memory Window 1 LMADRS Low */ + u16 lmw1h; /* 0x56 Local Memory Window 1 LMADRS High */ + u16 lmw1bl; /* 0x58 Local Memory Window 1 Base Address Low */ + u16 lmw1bh; /* 0x5A Local Memory Window 1 Base Address High */ + u16 lmw2l; /* 0x5C Local Memory Window 2 LMADRS Low */ + u16 lmw2h; /* 0x5E Local Memory Window 2 LMADRS High */ + u16 lmw2bl; /* 0x60 Local Memory Window 2 Base Address Low */ + u16 lmw2bh; /* 0x62 Local Memory Window 2 Base Address High */ + u8 x06[0x98]; + u8 misc; /* 0xFC MISC */ + u8 x07[3]; +} __attribute__((packed)); + +#define UHCCR_PM_GKEN 0x0001 +#define UHCCR_PM_CKRNEN 0x0002 +#define UHCCR_PM_USBPW1 0x0004 +#define UHCCR_PM_USBPW2 0x0008 +#define UHCCR_PM_PMEE 0x0100 +#define UHCCR_PM_PMES 0x8000 + +/*-------------------------------------------------------------------------*/ + +struct tmio_hcd { + struct tmio_uhccr __iomem *ccr; +}; + +#define hcd_to_tmio(hcd) ((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1)) +#define ohci_to_tmio(ohci) ((struct tmio_hcd *)(ohci + 1)) + +/*-------------------------------------------------------------------------*/ + +static void tmio_stop_hc(struct platform_device *dev) +{ + struct mfd_cell *cell = mfd_get_cell(dev); + struct usb_hcd *hcd = platform_get_drvdata(dev); + struct tmio_hcd *tmio = hcd_to_tmio(hcd); + struct tmio_uhccr __iomem *ccr = tmio->ccr; + u16 pm; + + pm = UHCCR_PM_GKEN | UHCCR_PM_CKRNEN | UHCCR_PM_USBPW1 | UHCCR_PM_USBPW2; + iowrite8(0, &ccr->intc); + iowrite8(0, &ccr->ilme); + iowrite16(0, &ccr->basel); + iowrite16(0, &ccr->baseh); + iowrite16(pm, &ccr->pm); + + cell->disable(dev); +} + +static void tmio_start_hc(struct platform_device *dev) +{ + struct mfd_cell *cell = mfd_get_cell(dev); + struct usb_hcd *hcd = platform_get_drvdata(dev); + struct tmio_hcd *tmio = hcd_to_tmio(hcd); + struct tmio_uhccr __iomem *ccr = tmio->ccr; + u16 pm; + unsigned long base = hcd->rsrc_start; + + pm = UHCCR_PM_CKRNEN | UHCCR_PM_GKEN | UHCCR_PM_PMEE | UHCCR_PM_PMES; + cell->enable(dev); + + iowrite16(pm, &ccr->pm); + iowrite16(base, &ccr->basel); + iowrite16(base >> 16, &ccr->baseh); + iowrite8(1, &ccr->ilme); + iowrite8(2, &ccr->intc); + + dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n", + ioread8(&ccr->revid), hcd->rsrc_start, hcd->irq); +} + +static int usb_hcd_tmio_probe(const struct hc_driver *driver, + struct platform_device *dev) +{ + struct resource *config = platform_get_resource_byname(dev, IORESOURCE_MEM, TMIO_OHCI_CONFIG); + struct resource *regs = platform_get_resource_byname(dev, IORESOURCE_MEM, TMIO_OHCI_CONTROL); + struct resource *sram = platform_get_resource_byname(dev, IORESOURCE_MEM, TMIO_OHCI_SRAM); + int irq = platform_get_irq(dev, 0); + struct tmio_hcd *tmio; + struct ohci_hcd *ohci; + struct usb_hcd *hcd; + int retval; + + if (usb_disabled()) + return -ENODEV; + + hcd = usb_create_hcd(driver, &dev->dev, dev->dev.bus_id); + if (!hcd) { + retval = -ENOMEM; + goto err_usb_create_hcd; + } + + hcd->rsrc_start = regs->start; + hcd->rsrc_len = regs->end - regs->start + 1; + + tmio = hcd_to_tmio(hcd); + + tmio->ccr = ioremap(config->start, config->end - config->start + 1); + if (!tmio->ccr) { + retval = -ENOMEM; + goto err_ioremap_ccr; + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (!hcd->regs) { + retval = -ENOMEM; + goto err_ioremap_regs; + } + + if (dma_declare_coherent_memory(&dev->dev, sram->start, + sram->start, + sram->end - sram->start + 1, + DMA_MEMORY_MAP) != DMA_MEMORY_MAP) { + retval = -EBUSY; + goto err_dma_declare; + } + + retval = dmabounce_register_dev(&dev->dev, 512, 4096); + if (retval) + goto err_dmabounce_register_dev; + + tmio_start_hc(dev); + ohci = hcd_to_ohci(hcd); + ohci_hcd_init(ohci); + + retval = usb_add_hcd(hcd, irq, IRQF_DISABLED); + + if (retval == 0) + return retval; + + tmio_stop_hc(dev); + + dmabounce_unregister_dev(&dev->dev); +err_dmabounce_register_dev: + dma_release_declared_memory(&dev->dev); +err_dma_declare: + iounmap(hcd->regs); +err_ioremap_regs: + iounmap(tmio->ccr); +err_ioremap_ccr: + usb_put_hcd(hcd); +err_usb_create_hcd: + + return retval; +} + +static void usb_hcd_tmio_remove(struct usb_hcd *hcd, struct platform_device *dev) +{ + struct tmio_hcd *tmio = hcd_to_tmio(hcd); + + usb_remove_hcd(hcd); + tmio_stop_hc(dev); + dmabounce_unregister_dev(&dev->dev); + dma_release_declared_memory(&dev->dev); + iounmap(hcd->regs); + iounmap(tmio->ccr); + usb_put_hcd(hcd); +} + +static int __devinit +ohci_tmio_start(struct usb_hcd *hcd) +{ + struct ohci_hcd *ohci = hcd_to_ohci(hcd); + int retval; + + if ((retval = ohci_init(ohci)) < 0) + return retval; + + if ((retval = ohci_run(ohci)) < 0) { + err("can't start %s", hcd->self.bus_name); + ohci_stop(hcd); + return retval; + } + + return 0; +} + +static const struct hc_driver ohci_tmio_hc_driver = { + .description = hcd_name, + .product_desc = "TMIO OHCI USB Host Controller", + .hcd_priv_size = sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd), + + /* generic hardware linkage */ + .irq = ohci_irq, + .flags = HCD_USB11 | HCD_MEMORY, + + /* basic lifecycle operations */ + .start = ohci_tmio_start, + .stop = ohci_stop, + .shutdown = ohci_shutdown, + + /* managing i/o requests and associated device resources */ + .urb_enqueue = ohci_urb_enqueue, + .urb_dequeue = ohci_urb_dequeue, + .endpoint_disable = ohci_endpoint_disable, + + /* scheduling support */ + .get_frame_number = ohci_get_frame, + + /* root hub support */ + .hub_status_data = ohci_hub_status_data, + .hub_control = ohci_hub_control, + .hub_irq_enable = ohci_rhsc_enable, +#ifdef CONFIG_PM + .bus_suspend = ohci_bus_suspend, + .bus_resume = ohci_bus_resume, +#endif + .start_port_reset = ohci_start_port_reset, +}; + +/*-------------------------------------------------------------------------*/ +static struct platform_driver ohci_hcd_tmio_driver; + +static int +tmio_dmabounce_check(struct device *dev, dma_addr_t dma, size_t size, void *data) +{ + struct resource *sram = data; +#ifdef DEBUG + printk(KERN_ERR "tmio_dmabounce_check: %08x %d\n", dma, size); +#endif + + if (dev->driver != &ohci_hcd_tmio_driver.driver) + return 0; + + if (sram->start <= dma && dma + size <= sram->end) + return 0; + + return 1; +} + +static u64 dma_mask = DMA_32BIT_MASK; + +static int ohci_hcd_tmio_drv_probe(struct platform_device *dev) +{ + struct resource *sram = platform_get_resource_byname(dev, IORESOURCE_MEM, TMIO_OHCI_SRAM); + + dev->dev.dma_mask = &dma_mask; + dev->dev.coherent_dma_mask = DMA_32BIT_MASK; + + dmabounce_register_checker(tmio_dmabounce_check, sram); + + return usb_hcd_tmio_probe(&ohci_tmio_hc_driver, dev); +} + +static int ohci_hcd_tmio_drv_remove(struct platform_device *dev) +{ + struct usb_hcd *hcd = platform_get_drvdata(dev); + struct resource *sram = platform_get_resource_byname(dev, IORESOURCE_MEM, TMIO_OHCI_SRAM); + + usb_hcd_tmio_remove(hcd, dev); + + platform_set_drvdata(dev, NULL); + + dmabounce_remove_checker(tmio_dmabounce_check, sram); + + return 0; +} + +#ifdef CONFIG_PM +static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state) +{ + struct usb_hcd *hcd = platform_get_drvdata(dev); + struct ohci_hcd *ohci = hcd_to_ohci(hcd); + + if (time_before(jiffies, ohci->next_statechange)) + msleep(5); + ohci->next_statechange = jiffies; + + tmio_stop_hc(dev); + hcd->state = HC_STATE_SUSPENDED; + dev->dev.power.power_state = PMSG_SUSPEND; + + return 0; +} + +static int ohci_hcd_tmio_drv_resume(struct platform_device *dev) +{ + struct usb_hcd *hcd = platform_get_drvdata(dev); + struct ohci_hcd *ohci = hcd_to_ohci(hcd); + + if (time_before(jiffies, ohci->next_statechange)) + msleep(5); + ohci->next_statechange = jiffies; + + tmio_start_hc(dev); + + dev->dev.power.power_state = PMSG_ON; + usb_hcd_resume_root_hub(hcd); + + return 0; +} +#endif + +static struct platform_driver ohci_hcd_tmio_driver = { + .probe = ohci_hcd_tmio_drv_probe, + .remove = ohci_hcd_tmio_drv_remove, + .shutdown = usb_hcd_platform_shutdown, +#ifdef CONFIG_PM + .suspend = ohci_hcd_tmio_drv_suspend, + .resume = ohci_hcd_tmio_drv_resume, +#endif + .driver = { + .name = "tmio-ohci", + }, +}; -- 1.5.3.8