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This is a rewriting of the OE patch of the same name.
The OE patch is different to this in that it:
- reorders the constraints (we keep them in the same order)
- its definition of attr "type" seem not to correspond to the insns it uses
(so here we define them to what seems right)
- in movdf, it replaces operand 1 "general_operand" with "soft_df_operand" and
removes the first two clauses (r<->Q = memory indexed by base register)
Index: gcc-4.2.4/gcc/config/arm/cirrus.md
===================================================================
--- gcc-4.2.4.orig/gcc/config/arm/cirrus.md 2009-08-09 15:43:46.000000000 +0100
+++ gcc-4.2.4/gcc/config/arm/cirrus.md 2009-08-09 15:45:08.000000000 +0100
@@ -403,8 +403,8 @@
;; on HARD_REGNO_MODE_OK.
(define_insn "*cirrus_movsf_hard_insn"
- [(set (match_operand:SF 0 "nonimmediate_operand" "=v,v,v,r,m,r,r,m")
- (match_operand:SF 1 "general_operand" "v,mE,r,v,v,r,mE,r"))]
+ [(set (match_operand:SF 0 "nonimmediate_operand" "=v,v ,v,r,Uy,r,r,m")
+ (match_operand:SF 1 "general_operand" "v,UyE,r,v,v ,r,mE,r"))]
"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK
&& (GET_CODE (operands[0]) != MEM
|| register_operand (operands[1], SFmode))"
@@ -414,19 +414,18 @@
cfmvsr%?\\t%V0, %1
cfmvrs%?\\t%0, %V1
cfstrs%?\\t%V1, %0
- mov%?\\t%0, %1
+ mov%?\\t%0, %1\\t%@ float
ldr%?\\t%0, %1\\t%@ float
str%?\\t%1, %0\\t%@ float"
- [(set_attr "length" " *, *, *, *, *, 4, 4, 4")
- (set_attr "type" " *, load1, *, *,store1, *,load1,store1")
- (set_attr "pool_range" " *, 1020, *, *, *, *,4096, *")
- (set_attr "neg_pool_range" " *, 1008, *, *, *, *,4084, *")
+ [(set_attr "type" "ffarith,f_loads,r_2_f,f_2_r,f_stores,*,load1,store1")
+ (set_attr "pool_range" " *, 1020, *, *, *, *,4096, *")
+ (set_attr "neg_pool_range" " *, 1008, *, *, *, *,4080, *")
(set_attr "cirrus" "normal,normal,move,normal,normal,not, not, not")]
)
(define_insn "*cirrus_movdf_hard_insn"
- [(set (match_operand:DF 0 "nonimmediate_operand" "=r,Q,r,m,r,v,v,v,r,m")
- (match_operand:DF 1 "general_operand" "Q,r,r,r,mF,v,mF,r,v,v"))]
+ [(set (match_operand:DF 0 "nonimmediate_operand" "=r,Q,r,m,r ,v,v ,v,r,Uy")
+ (match_operand:DF 1 "general_operand" "Q,r,r,r,mF,v,UyF,r,v,v"))]
"TARGET_ARM
&& TARGET_HARD_FLOAT && TARGET_MAVERICK
&& (GET_CODE (operands[0]) != MEM
@@ -447,10 +446,10 @@
default: gcc_unreachable ();
}
}"
- [(set_attr "type" "load1,store2, *,store2,load1, *, load1, *, *,store2")
- (set_attr "length" " 4, 4, 8, 8, 8, 4, 4, 8, 8, 4")
- (set_attr "pool_range" " *, *, *, *, 252, *, 1020, *, *, *")
- (set_attr "neg_pool_range" " *, *, *, *, 244, *, 1008, *, *, *")
- (set_attr "cirrus" " not, not,not, not, not,normal,double,move,normal,double")]
+ [(set_attr "type" "load2,store2, *,store2,load2,ffarith,f_loadd,r_2_f,f_2_r,store2")
+ (set_attr "length" " 4, 4, 8, 8, 8, 4, 4, 8, 8, 4")
+ (set_attr "pool_range" " *, *, *, *, 1020, *, 1020, *, *, *")
+ (set_attr "neg_pool_range" " *, *, *, *, 1008, *, 1008, *, *, *")
+ (set_attr "cirrus" " not, not,not, not, not,normal,double,move,normal,double")]
)
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