diff options
Diffstat (limited to 'meta-oe/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106742.patch')
| -rw-r--r-- | meta-oe/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106742.patch | 3142 |
1 files changed, 1572 insertions, 1570 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106742.patch b/meta-oe/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106742.patch index d14f06c3ff..395c08cab7 100644 --- a/meta-oe/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106742.patch +++ b/meta-oe/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106742.patch @@ -118,9 +118,11 @@ (neon_vld3<mode>, neon_vld4<mode>): Update accordingly. === modified file 'gcc/calls.c' ---- old/gcc/calls.c 2011-03-03 21:56:58 +0000 -+++ new/gcc/calls.c 2011-05-03 15:17:25 +0000 -@@ -684,7 +684,7 @@ +Index: gcc-4_6-branch/gcc/calls.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/calls.c 2011-06-24 08:33:49.000000000 -0700 ++++ gcc-4_6-branch/gcc/calls.c 2011-09-16 20:16:00.217564705 -0700 +@@ -686,7 +686,7 @@ /* If the value is a non-legitimate constant, force it into a pseudo now. TLS symbols sometimes need a call to resolve. */ if (CONSTANT_P (args[i].value) @@ -129,7 +131,7 @@ args[i].value = force_reg (args[i].mode, args[i].value); /* If we are to promote the function arg to a wider mode, -@@ -3447,7 +3447,8 @@ +@@ -3449,7 +3449,8 @@ /* Make sure it is a reasonable operand for a move or push insn. */ if (!REG_P (addr) && !MEM_P (addr) @@ -139,7 +141,7 @@ addr = force_operand (addr, NULL_RTX); argvec[count].value = addr; -@@ -3488,7 +3489,7 @@ +@@ -3490,7 +3491,7 @@ /* Make sure it is a reasonable operand for a move or push insn. */ if (!REG_P (val) && !MEM_P (val) @@ -148,10 +150,10 @@ val = force_operand (val, NULL_RTX); if (pass_by_reference (&args_so_far, mode, NULL_TREE, 1)) - -=== modified file 'gcc/config/arm/arm-protos.h' ---- old/gcc/config/arm/arm-protos.h 2011-01-29 03:20:57 +0000 -+++ new/gcc/config/arm/arm-protos.h 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/config/arm/arm-protos.h +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/arm-protos.h 2011-06-24 08:33:37.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/arm-protos.h 2011-09-16 20:16:00.217564705 -0700 @@ -81,7 +81,6 @@ extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx, bool); @@ -160,10 +162,10 @@ extern int cirrus_memory_offset (rtx); extern int arm_coproc_mem_operand (rtx, bool); - -=== modified file 'gcc/config/arm/arm.c' ---- old/gcc/config/arm/arm.c 2011-04-28 11:46:58 +0000 -+++ new/gcc/config/arm/arm.c 2011-05-03 15:18:07 +0000 +Index: gcc-4_6-branch/gcc/config/arm/arm.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/arm.c 2011-09-16 20:14:34.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/arm.c 2011-09-16 20:16:00.237564275 -0700 @@ -143,6 +143,8 @@ static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); @@ -608,10 +610,12 @@ NEON_ARG_STOP); } -@@ -22267,6 +22402,20 @@ - return false; - } +@@ -22265,6 +22400,20 @@ + return true; + return false; ++} ++ +/* Implements target hook array_mode_supported_p. */ + +static bool @@ -624,16 +628,14 @@ + return true; + + return false; -+} -+ + } + /* Use the option -mvectorize-with-neon-quad to override the use of doubleword - registers when autovectorizing for Neon, at least until multiple vector - widths are supported properly by the middle-end. */ - -=== modified file 'gcc/config/arm/arm.h' ---- old/gcc/config/arm/arm.h 2011-02-21 14:04:51 +0000 -+++ new/gcc/config/arm/arm.h 2011-05-03 15:17:25 +0000 -@@ -1775,27 +1775,6 @@ +Index: gcc-4_6-branch/gcc/config/arm/arm.h +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/arm.h 2011-09-16 20:14:33.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/arm.h 2011-09-16 20:16:00.237564275 -0700 +@@ -1777,27 +1777,6 @@ #define TARGET_DEFAULT_WORD_RELOCATIONS 0 #endif @@ -661,10 +663,10 @@ #ifndef SUBTARGET_NAME_ENCODING_LENGTHS #define SUBTARGET_NAME_ENCODING_LENGTHS #endif - -=== modified file 'gcc/config/arm/iterators.md' ---- old/gcc/config/arm/iterators.md 2010-09-21 13:11:03 +0000 -+++ new/gcc/config/arm/iterators.md 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/config/arm/iterators.md +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/iterators.md 2011-06-24 08:33:37.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/iterators.md 2011-09-16 20:16:00.237564275 -0700 @@ -194,24 +194,22 @@ ;; Mode of pair of elements for each vector mode, to define transfer @@ -698,10 +700,10 @@ (V2SI "V4SI") (V4SI "V4SI") (V2SF "V4SF") (V4SF "V4SF") (DI "OI") (V2DI "OI")]) - -=== modified file 'gcc/config/arm/neon-testgen.ml' ---- old/gcc/config/arm/neon-testgen.ml 2010-05-24 18:36:31 +0000 -+++ new/gcc/config/arm/neon-testgen.ml 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/config/arm/neon-testgen.ml +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/neon-testgen.ml 2011-06-24 08:33:37.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/neon-testgen.ml 2011-09-16 20:16:00.237564275 -0700 @@ -177,7 +177,7 @@ let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}" @@ -711,11 +713,11 @@ | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]" - -=== modified file 'gcc/config/arm/neon.md' ---- old/gcc/config/arm/neon.md 2011-01-03 20:52:22 +0000 -+++ new/gcc/config/arm/neon.md 2011-05-03 15:14:56 +0000 -@@ -4247,16 +4247,16 @@ +Index: gcc-4_6-branch/gcc/config/arm/neon.md +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/neon.md 2011-07-19 21:50:44.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/neon.md 2011-09-16 20:16:00.247564269 -0700 +@@ -4250,16 +4250,16 @@ (define_insn "neon_vld1<mode>" [(set (match_operand:VDQX 0 "s_register_operand" "=w") @@ -735,7 +737,7 @@ (match_operand:VDX 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i")] UNSPEC_VLD1_LANE))] -@@ -4267,9 +4267,9 @@ +@@ -4270,9 +4270,9 @@ if (lane < 0 || lane >= max) error ("lane out of range"); if (max == 1) @@ -747,7 +749,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2)) -@@ -4279,7 +4279,7 @@ +@@ -4282,7 +4282,7 @@ (define_insn "neon_vld1_lane<mode>" [(set (match_operand:VQX 0 "s_register_operand" "=w") @@ -756,7 +758,7 @@ (match_operand:VQX 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i")] UNSPEC_VLD1_LANE))] -@@ -4298,9 +4298,9 @@ +@@ -4301,9 +4301,9 @@ } operands[0] = gen_rtx_REG (<V_HALF>mode, regno); if (max == 2) @@ -768,7 +770,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2)) -@@ -4310,14 +4310,14 @@ +@@ -4313,14 +4313,14 @@ (define_insn "neon_vld1_dup<mode>" [(set (match_operand:VDX 0 "s_register_operand" "=w") @@ -786,7 +788,7 @@ } [(set (attr "neon_type") (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4327,14 +4327,14 @@ +@@ -4330,14 +4330,14 @@ (define_insn "neon_vld1_dup<mode>" [(set (match_operand:VQX 0 "s_register_operand" "=w") @@ -804,7 +806,7 @@ } [(set (attr "neon_type") (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4343,15 +4343,15 @@ +@@ -4346,15 +4346,15 @@ ) (define_insn "neon_vst1<mode>" @@ -823,7 +825,7 @@ (vec_select:<V_elem> (match_operand:VDX 1 "s_register_operand" "w") (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] -@@ -4362,9 +4362,9 @@ +@@ -4365,9 +4365,9 @@ if (lane < 0 || lane >= max) error ("lane out of range"); if (max == 1) @@ -835,7 +837,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 1)) -@@ -4372,7 +4372,7 @@ +@@ -4375,7 +4375,7 @@ (const_string "neon_vst1_vst2_lane")))]) (define_insn "neon_vst1_lane<mode>" @@ -844,7 +846,7 @@ (vec_select:<V_elem> (match_operand:VQX 1 "s_register_operand" "w") (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] -@@ -4391,24 +4391,24 @@ +@@ -4394,24 +4394,24 @@ } operands[1] = gen_rtx_REG (<V_HALF>mode, regno); if (max == 2) @@ -874,7 +876,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4418,16 +4418,16 @@ +@@ -4421,16 +4421,16 @@ (define_insn "neon_vld2<mode>" [(set (match_operand:OI 0 "s_register_operand" "=w") @@ -894,7 +896,7 @@ (match_operand:TI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4444,7 +4444,7 @@ +@@ -4447,7 +4447,7 @@ ops[1] = gen_rtx_REG (DImode, regno + 2); ops[2] = operands[1]; ops[3] = operands[3]; @@ -903,7 +905,7 @@ return ""; } [(set_attr "neon_type" "neon_vld1_vld2_lane")] -@@ -4452,7 +4452,7 @@ +@@ -4455,7 +4455,7 @@ (define_insn "neon_vld2_lane<mode>" [(set (match_operand:OI 0 "s_register_operand" "=w") @@ -912,7 +914,7 @@ (match_operand:OI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4474,7 +4474,7 @@ +@@ -4477,7 +4477,7 @@ ops[1] = gen_rtx_REG (DImode, regno + 4); ops[2] = operands[1]; ops[3] = GEN_INT (lane); @@ -921,7 +923,7 @@ return ""; } [(set_attr "neon_type" "neon_vld1_vld2_lane")] -@@ -4482,15 +4482,15 @@ +@@ -4485,15 +4485,15 @@ (define_insn "neon_vld2_dup<mode>" [(set (match_operand:TI 0 "s_register_operand" "=w") @@ -940,7 +942,7 @@ } [(set (attr "neon_type") (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4499,16 +4499,16 @@ +@@ -4502,16 +4502,16 @@ ) (define_insn "neon_vst2<mode>" @@ -960,7 +962,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4517,17 +4517,17 @@ +@@ -4520,17 +4520,17 @@ ) (define_insn "neon_vst2<mode>" @@ -981,7 +983,7 @@ (unspec:<V_two_elem> [(match_operand:TI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") -@@ -4545,14 +4545,14 @@ +@@ -4548,14 +4548,14 @@ ops[1] = gen_rtx_REG (DImode, regno); ops[2] = gen_rtx_REG (DImode, regno + 2); ops[3] = operands[2]; @@ -998,7 +1000,7 @@ (unspec:<V_two_elem> [(match_operand:OI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") -@@ -4575,7 +4575,7 @@ +@@ -4578,7 +4578,7 @@ ops[1] = gen_rtx_REG (DImode, regno); ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = GEN_INT (lane); @@ -1007,7 +1009,7 @@ return ""; } [(set_attr "neon_type" "neon_vst1_vst2_lane")] -@@ -4583,15 +4583,15 @@ +@@ -4586,15 +4586,15 @@ (define_insn "neon_vld3<mode>" [(set (match_operand:EI 0 "s_register_operand" "=w") @@ -1026,7 +1028,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4600,27 +4600,25 @@ +@@ -4603,27 +4603,25 @@ ) (define_expand "neon_vld3<mode>" @@ -1064,7 +1066,7 @@ "TARGET_NEON" { int regno = REGNO (operands[0]); -@@ -4628,8 +4626,8 @@ +@@ -4631,8 +4629,8 @@ ops[0] = gen_rtx_REG (DImode, regno); ops[1] = gen_rtx_REG (DImode, regno + 4); ops[2] = gen_rtx_REG (DImode, regno + 8); @@ -1075,7 +1077,7 @@ return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4637,13 +4635,10 @@ +@@ -4640,13 +4638,10 @@ (define_insn "neon_vld3qb<mode>" [(set (match_operand:CI 0 "s_register_operand" "=w") @@ -1092,7 +1094,7 @@ "TARGET_NEON" { int regno = REGNO (operands[0]); -@@ -4651,8 +4646,8 @@ +@@ -4654,8 +4649,8 @@ ops[0] = gen_rtx_REG (DImode, regno + 2); ops[1] = gen_rtx_REG (DImode, regno + 6); ops[2] = gen_rtx_REG (DImode, regno + 10); @@ -1103,7 +1105,7 @@ return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4660,7 +4655,7 @@ +@@ -4663,7 +4658,7 @@ (define_insn "neon_vld3_lane<mode>" [(set (match_operand:EI 0 "s_register_operand" "=w") @@ -1112,7 +1114,7 @@ (match_operand:EI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4678,7 +4673,7 @@ +@@ -4681,7 +4676,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = operands[1]; ops[4] = operands[3]; @@ -1121,7 +1123,7 @@ ops); return ""; } -@@ -4687,7 +4682,7 @@ +@@ -4690,7 +4685,7 @@ (define_insn "neon_vld3_lane<mode>" [(set (match_operand:CI 0 "s_register_operand" "=w") @@ -1130,7 +1132,7 @@ (match_operand:CI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4710,7 +4705,7 @@ +@@ -4713,7 +4708,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 8); ops[3] = operands[1]; ops[4] = GEN_INT (lane); @@ -1139,7 +1141,7 @@ ops); return ""; } -@@ -4719,7 +4714,7 @@ +@@ -4722,7 +4717,7 @@ (define_insn "neon_vld3_dup<mode>" [(set (match_operand:EI 0 "s_register_operand" "=w") @@ -1148,7 +1150,7 @@ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD3_DUP))] "TARGET_NEON" -@@ -4732,11 +4727,11 @@ +@@ -4735,11 +4730,11 @@ ops[1] = gen_rtx_REG (DImode, regno + 2); ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = operands[1]; @@ -1162,7 +1164,7 @@ } [(set (attr "neon_type") (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4744,16 +4739,16 @@ +@@ -4747,16 +4742,16 @@ (const_string "neon_vld1_1_2_regs")))]) (define_insn "neon_vst3<mode>" @@ -1182,7 +1184,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4761,62 +4756,60 @@ +@@ -4764,62 +4759,60 @@ (const_string "neon_vst2_4_regs_vst3_vst4")))]) (define_expand "neon_vst3<mode>" @@ -1264,7 +1266,7 @@ (unspec:<V_three_elem> [(match_operand:EI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") -@@ -4835,7 +4828,7 @@ +@@ -4838,7 +4831,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 2); ops[3] = gen_rtx_REG (DImode, regno + 4); ops[4] = operands[2]; @@ -1273,7 +1275,7 @@ ops); return ""; } -@@ -4843,7 +4836,7 @@ +@@ -4846,7 +4839,7 @@ ) (define_insn "neon_vst3_lane<mode>" @@ -1282,7 +1284,7 @@ (unspec:<V_three_elem> [(match_operand:CI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") -@@ -4867,7 +4860,7 @@ +@@ -4870,7 +4863,7 @@ ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = gen_rtx_REG (DImode, regno + 8); ops[4] = GEN_INT (lane); @@ -1291,7 +1293,7 @@ ops); return ""; } -@@ -4875,15 +4868,15 @@ +@@ -4878,15 +4871,15 @@ (define_insn "neon_vld4<mode>" [(set (match_operand:OI 0 "s_register_operand" "=w") @@ -1310,7 +1312,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4892,27 +4885,25 @@ +@@ -4895,27 +4888,25 @@ ) (define_expand "neon_vld4<mode>" @@ -1348,7 +1350,7 @@ "TARGET_NEON" { int regno = REGNO (operands[0]); -@@ -4921,8 +4912,8 @@ +@@ -4924,8 +4915,8 @@ ops[1] = gen_rtx_REG (DImode, regno + 4); ops[2] = gen_rtx_REG (DImode, regno + 8); ops[3] = gen_rtx_REG (DImode, regno + 12); @@ -1359,7 +1361,7 @@ return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4930,13 +4921,10 @@ +@@ -4933,13 +4924,10 @@ (define_insn "neon_vld4qb<mode>" [(set (match_operand:XI 0 "s_register_operand" "=w") @@ -1376,7 +1378,7 @@ "TARGET_NEON" { int regno = REGNO (operands[0]); -@@ -4945,8 +4933,8 @@ +@@ -4948,8 +4936,8 @@ ops[1] = gen_rtx_REG (DImode, regno + 6); ops[2] = gen_rtx_REG (DImode, regno + 10); ops[3] = gen_rtx_REG (DImode, regno + 14); @@ -1387,7 +1389,7 @@ return ""; } [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4954,7 +4942,7 @@ +@@ -4957,7 +4945,7 @@ (define_insn "neon_vld4_lane<mode>" [(set (match_operand:OI 0 "s_register_operand" "=w") @@ -1396,7 +1398,7 @@ (match_operand:OI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4973,7 +4961,7 @@ +@@ -4976,7 +4964,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 6); ops[4] = operands[1]; ops[5] = operands[3]; @@ -1405,7 +1407,7 @@ ops); return ""; } -@@ -4982,7 +4970,7 @@ +@@ -4985,7 +4973,7 @@ (define_insn "neon_vld4_lane<mode>" [(set (match_operand:XI 0 "s_register_operand" "=w") @@ -1414,7 +1416,7 @@ (match_operand:XI 2 "s_register_operand" "0") (match_operand:SI 3 "immediate_operand" "i") (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -5006,7 +4994,7 @@ +@@ -5009,7 +4997,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 12); ops[4] = operands[1]; ops[5] = GEN_INT (lane); @@ -1423,7 +1425,7 @@ ops); return ""; } -@@ -5015,7 +5003,7 @@ +@@ -5018,7 +5006,7 @@ (define_insn "neon_vld4_dup<mode>" [(set (match_operand:OI 0 "s_register_operand" "=w") @@ -1432,7 +1434,7 @@ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] UNSPEC_VLD4_DUP))] "TARGET_NEON" -@@ -5029,12 +5017,12 @@ +@@ -5032,12 +5020,12 @@ ops[2] = gen_rtx_REG (DImode, regno + 4); ops[3] = gen_rtx_REG (DImode, regno + 6); ops[4] = operands[1]; @@ -1447,7 +1449,7 @@ } [(set (attr "neon_type") (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -5043,16 +5031,16 @@ +@@ -5046,16 +5034,16 @@ ) (define_insn "neon_vst4<mode>" @@ -1467,7 +1469,7 @@ } [(set (attr "neon_type") (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -5061,64 +5049,62 @@ +@@ -5064,64 +5052,62 @@ ) (define_expand "neon_vst4<mode>" @@ -1551,7 +1553,7 @@ (unspec:<V_four_elem> [(match_operand:OI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") -@@ -5138,7 +5124,7 @@ +@@ -5141,7 +5127,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 4); ops[4] = gen_rtx_REG (DImode, regno + 6); ops[5] = operands[2]; @@ -1560,7 +1562,7 @@ ops); return ""; } -@@ -5146,7 +5132,7 @@ +@@ -5149,7 +5135,7 @@ ) (define_insn "neon_vst4_lane<mode>" @@ -1569,7 +1571,7 @@ (unspec:<V_four_elem> [(match_operand:XI 1 "s_register_operand" "w") (match_operand:SI 2 "immediate_operand" "i") -@@ -5171,7 +5157,7 @@ +@@ -5174,7 +5160,7 @@ ops[3] = gen_rtx_REG (DImode, regno + 8); ops[4] = gen_rtx_REG (DImode, regno + 12); ops[5] = GEN_INT (lane); @@ -1578,22 +1580,23 @@ ops); return ""; } - -=== modified file 'gcc/config/arm/predicates.md' ---- old/gcc/config/arm/predicates.md 2011-04-07 10:52:12 +0000 -+++ new/gcc/config/arm/predicates.md 2011-05-03 15:14:56 +0000 -@@ -683,3 +683,7 @@ - } - return true; - }) +Index: gcc-4_6-branch/gcc/config/arm/predicates.md +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/predicates.md 2011-09-16 19:58:21.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/predicates.md 2011-09-16 20:19:03.967834108 -0700 +@@ -686,3 +686,8 @@ + + (define_special_predicate "add_operator" + (match_code "plus")) + +(define_special_predicate "neon_struct_operand" + (and (match_code "mem") + (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)"))) - -=== modified file 'gcc/doc/tm.texi' ---- old/gcc/doc/tm.texi 2011-01-22 19:35:10 +0000 -+++ new/gcc/doc/tm.texi 2011-05-03 15:17:25 +0000 ++ +Index: gcc-4_6-branch/gcc/doc/tm.texi +=================================================================== +--- gcc-4_6-branch.orig/gcc/doc/tm.texi 2011-06-24 08:13:00.000000000 -0700 ++++ gcc-4_6-branch/gcc/doc/tm.texi 2011-09-16 20:16:00.257564628 -0700 @@ -2533,7 +2533,7 @@ register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when @var{x} is a floating-point constant. If the constant can't be loaded @@ -1670,10 +1673,10 @@ @deftypefn {Target Hook} rtx TARGET_DELEGITIMIZE_ADDRESS (rtx @var{x}) This hook is used to undo the possibly obfuscating effects of the - -=== modified file 'gcc/doc/tm.texi.in' ---- old/gcc/doc/tm.texi.in 2011-01-22 19:35:10 +0000 -+++ new/gcc/doc/tm.texi.in 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/doc/tm.texi.in +=================================================================== +--- gcc-4_6-branch.orig/gcc/doc/tm.texi.in 2011-06-24 08:13:00.000000000 -0700 ++++ gcc-4_6-branch/gcc/doc/tm.texi.in 2011-09-16 20:16:00.257564628 -0700 @@ -2521,7 +2521,7 @@ register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when @var{x} is a floating-point constant. If the constant can't be loaded @@ -1724,10 +1727,10 @@ @hook TARGET_DELEGITIMIZE_ADDRESS This hook is used to undo the possibly obfuscating effects of the - -=== modified file 'gcc/expr.c' ---- old/gcc/expr.c 2011-04-05 16:18:11 +0000 -+++ new/gcc/expr.c 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/expr.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/expr.c 2011-09-16 20:14:32.000000000 -0700 ++++ gcc-4_6-branch/gcc/expr.c 2011-09-16 20:16:00.267564792 -0700 @@ -1497,7 +1497,7 @@ if (nregs == 0) return; @@ -1782,7 +1785,7 @@ x = validize_mem (force_const_mem (mode, x)); /* If X is a hard register in a non-integer mode, copy it into a pseudo; -@@ -9066,7 +9066,7 @@ +@@ -9108,7 +9108,7 @@ constant and we don't need a memory reference. */ if (CONSTANT_P (op0) && mode2 != BLKmode @@ -1791,10 +1794,10 @@ && !must_force_mem) op0 = force_reg (mode2, op0); - -=== modified file 'gcc/hooks.c' ---- old/gcc/hooks.c 2010-11-25 13:16:03 +0000 -+++ new/gcc/hooks.c 2011-05-03 15:16:01 +0000 +Index: gcc-4_6-branch/gcc/hooks.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/hooks.c 2011-06-24 08:33:48.000000000 -0700 ++++ gcc-4_6-branch/gcc/hooks.c 2011-09-16 20:16:00.267564792 -0700 @@ -101,6 +101,15 @@ return true; } @@ -1811,10 +1814,10 @@ /* Generic hook that takes (FILE *, const char *) and does nothing. */ void hook_void_FILEptr_constcharptr (FILE *a ATTRIBUTE_UNUSED, const char *b ATTRIBUTE_UNUSED) - -=== modified file 'gcc/hooks.h' ---- old/gcc/hooks.h 2010-11-25 13:16:03 +0000 -+++ new/gcc/hooks.h 2011-05-03 15:16:01 +0000 +Index: gcc-4_6-branch/gcc/hooks.h +=================================================================== +--- gcc-4_6-branch.orig/gcc/hooks.h 2011-06-24 08:33:48.000000000 -0700 ++++ gcc-4_6-branch/gcc/hooks.h 2011-09-16 20:16:00.267564792 -0700 @@ -34,6 +34,8 @@ extern bool hook_bool_mode_true (enum machine_mode); extern bool hook_bool_mode_const_rtx_false (enum machine_mode, const_rtx); @@ -1824,10 +1827,10 @@ extern bool hook_bool_tree_false (tree); extern bool hook_bool_const_tree_false (const_tree); extern bool hook_bool_tree_true (tree); - -=== modified file 'gcc/recog.c' ---- old/gcc/recog.c 2010-11-30 16:36:19 +0000 -+++ new/gcc/recog.c 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/recog.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/recog.c 2011-06-24 08:33:49.000000000 -0700 ++++ gcc-4_6-branch/gcc/recog.c 2011-09-16 20:16:00.277564886 -0700 @@ -930,7 +930,9 @@ return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode || mode == VOIDmode) @@ -1850,10 +1853,10 @@ } /* Returns 1 if OP is an operand that is a CONST_INT. */ - -=== modified file 'gcc/reload.c' ---- old/gcc/reload.c 2011-02-02 16:52:21 +0000 -+++ new/gcc/reload.c 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/reload.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/reload.c 2011-06-24 08:33:49.000000000 -0700 ++++ gcc-4_6-branch/gcc/reload.c 2011-09-16 20:16:00.277564886 -0700 @@ -4721,7 +4721,8 @@ simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno], GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); @@ -1882,10 +1885,10 @@ || targetm.preferred_reload_class (XEXP (x, 1), rclass) == NO_REGS)) { - -=== modified file 'gcc/reload1.c' ---- old/gcc/reload1.c 2011-01-23 21:11:24 +0000 -+++ new/gcc/reload1.c 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/reload1.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/reload1.c 2011-06-24 08:33:49.000000000 -0700 ++++ gcc-4_6-branch/gcc/reload1.c 2011-09-16 20:16:00.277564886 -0700 @@ -4155,6 +4155,9 @@ } else if (function_invariant_p (x)) @@ -1911,10 +1914,10 @@ if (! reg_equiv_memory_loc[i]) reg_equiv_init[i] = NULL_RTX; } - -=== modified file 'gcc/stor-layout.c' ---- old/gcc/stor-layout.c 2011-03-10 22:37:22 +0000 -+++ new/gcc/stor-layout.c 2011-05-03 15:16:01 +0000 +Index: gcc-4_6-branch/gcc/stor-layout.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/stor-layout.c 2011-06-24 08:33:49.000000000 -0700 ++++ gcc-4_6-branch/gcc/stor-layout.c 2011-09-16 20:16:00.287564867 -0700 @@ -546,6 +546,34 @@ return MIN (BIGGEST_ALIGNMENT, MAX (1, mode_base_align[mode]*BITS_PER_UNIT)); } @@ -1967,10 +1970,10 @@ if (TYPE_MODE (type) != BLKmode && STRICT_ALIGNMENT && TYPE_ALIGN (type) < BIGGEST_ALIGNMENT && TYPE_ALIGN (type) < GET_MODE_ALIGNMENT (TYPE_MODE (type))) - -=== modified file 'gcc/target.def' ---- old/gcc/target.def 2011-01-22 19:35:10 +0000 -+++ new/gcc/target.def 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/target.def +=================================================================== +--- gcc-4_6-branch.orig/gcc/target.def 2011-06-24 08:33:48.000000000 -0700 ++++ gcc-4_6-branch/gcc/target.def 2011-09-16 20:16:00.287564867 -0700 @@ -1344,6 +1344,13 @@ unsigned, (unsigned nunroll, struct loop *loop), NULL) @@ -2024,10 +2027,10 @@ /* Compute cost of moving data from a register of class FROM to one of TO, using MODE. */ DEFHOOK - -=== modified file 'gcc/targhooks.c' ---- old/gcc/targhooks.c 2011-01-14 15:02:20 +0000 -+++ new/gcc/targhooks.c 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/targhooks.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/targhooks.c 2011-06-24 08:33:48.000000000 -0700 ++++ gcc-4_6-branch/gcc/targhooks.c 2011-09-16 20:16:00.287564867 -0700 @@ -1519,4 +1519,15 @@ { OPT_LEVELS_NONE, 0, NULL, 0 } }; @@ -2044,19 +2047,19 @@ +} + #include "gt-targhooks.h" - -=== modified file 'gcc/targhooks.h' ---- old/gcc/targhooks.h 2011-01-14 15:02:20 +0000 -+++ new/gcc/targhooks.h 2011-05-03 15:17:25 +0000 +Index: gcc-4_6-branch/gcc/targhooks.h +=================================================================== +--- gcc-4_6-branch.orig/gcc/targhooks.h 2011-06-24 08:33:48.000000000 -0700 ++++ gcc-4_6-branch/gcc/targhooks.h 2011-09-16 20:16:00.287564867 -0700 @@ -183,3 +183,4 @@ extern void *default_get_pch_validity (size_t *); extern const char *default_pch_valid_p (const void *, size_t); +extern bool default_legitimate_constant_p (enum machine_mode, rtx); - -=== added file 'gcc/testsuite/gcc.target/arm/neon-vld3-1.c' ---- old/gcc/testsuite/gcc.target/arm/neon-vld3-1.c 1970-01-01 00:00:00 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon-vld3-1.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon-vld3-1.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon-vld3-1.c 2011-09-16 20:16:00.287564867 -0700 @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ @@ -2085,10 +2088,10 @@ + foo (buffer); + return buffer[0] != 3; +} - -=== added file 'gcc/testsuite/gcc.target/arm/neon-vst3-1.c' ---- old/gcc/testsuite/gcc.target/arm/neon-vst3-1.c 1970-01-01 00:00:00 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon-vst3-1.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon-vst3-1.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon-vst3-1.c 2011-09-16 20:16:00.287564867 -0700 @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ @@ -2115,10 +2118,10 @@ + foo (buffer); + return buffer[35] != 1; +} - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c 2011-09-16 20:16:00.297564810 -0700 @@ -15,5 +15,5 @@ out_float32x4_t = vld1q_dup_f32 (0); } @@ -2126,10 +2129,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c 2011-09-16 20:16:00.297564810 -0700 @@ -15,5 +15,5 @@ out_poly16x8_t = vld1q_dup_p16 (0); } @@ -2137,10 +2140,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c 2011-09-16 20:16:00.297564810 -0700 @@ -15,5 +15,5 @@ out_poly8x16_t = vld1q_dup_p8 (0); } @@ -2148,10 +2151,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c 2011-09-16 20:16:00.297564810 -0700 @@ -15,5 +15,5 @@ out_int16x8_t = vld1q_dup_s16 (0); } @@ -2159,10 +2162,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c 2011-09-16 20:16:00.297564810 -0700 @@ -15,5 +15,5 @@ out_int32x4_t = vld1q_dup_s32 (0); } @@ -2170,10 +2173,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c 2011-09-16 20:16:00.347564808 -0700 @@ -15,5 +15,5 @@ out_int64x2_t = vld1q_dup_s64 (0); } @@ -2181,10 +2184,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c 2011-09-16 20:16:00.347564808 -0700 @@ -15,5 +15,5 @@ out_int8x16_t = vld1q_dup_s8 (0); } @@ -2192,10 +2195,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c 2011-09-16 20:16:00.347564808 -0700 @@ -15,5 +15,5 @@ out_uint16x8_t = vld1q_dup_u16 (0); } @@ -2203,10 +2206,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c 2011-09-16 20:16:00.347564808 -0700 @@ -15,5 +15,5 @@ out_uint32x4_t = vld1q_dup_u32 (0); } @@ -2214,10 +2217,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c 2011-09-16 20:16:00.347564808 -0700 @@ -15,5 +15,5 @@ out_uint64x2_t = vld1q_dup_u64 (0); } @@ -2225,10 +2228,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c 2011-09-16 20:16:00.347564808 -0700 @@ -15,5 +15,5 @@ out_uint8x16_t = vld1q_dup_u8 (0); } @@ -2236,10 +2239,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1); } @@ -2247,10 +2250,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1); } @@ -2258,10 +2261,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1); } @@ -2269,10 +2272,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1); } @@ -2280,10 +2283,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1); } @@ -2291,10 +2294,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1); } @@ -2302,10 +2305,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1); } @@ -2313,10 +2316,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1); } @@ -2324,10 +2327,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1); } @@ -2335,10 +2338,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1); } @@ -2346,10 +2349,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c 2011-09-16 20:16:00.347564808 -0700 @@ -16,5 +16,5 @@ out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1); } @@ -2357,10 +2360,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_float32x4_t = vld1q_f32 (0); } @@ -2368,10 +2371,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_poly16x8_t = vld1q_p16 (0); } @@ -2379,10 +2382,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_poly8x16_t = vld1q_p8 (0); } @@ -2390,10 +2393,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int16x8_t = vld1q_s16 (0); } @@ -2401,10 +2404,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int32x4_t = vld1q_s32 (0); } @@ -2412,10 +2415,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int64x2_t = vld1q_s64 (0); } @@ -2423,10 +2426,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int8x16_t = vld1q_s8 (0); } @@ -2434,10 +2437,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_uint16x8_t = vld1q_u16 (0); } @@ -2445,10 +2448,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_uint32x4_t = vld1q_u32 (0); } @@ -2456,10 +2459,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_uint64x2_t = vld1q_u64 (0); } @@ -2467,10 +2470,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_uint8x16_t = vld1q_u8 (0); } @@ -2478,10 +2481,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_float32x2_t = vld1_dup_f32 (0); } @@ -2489,10 +2492,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_poly16x4_t = vld1_dup_p16 (0); } @@ -2500,10 +2503,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_poly8x8_t = vld1_dup_p8 (0); } @@ -2511,10 +2514,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int16x4_t = vld1_dup_s16 (0); } @@ -2522,10 +2525,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int32x2_t = vld1_dup_s32 (0); } @@ -2533,10 +2536,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int64x1_t = vld1_dup_s64 (0); } @@ -2544,10 +2547,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_int8x8_t = vld1_dup_s8 (0); } @@ -2555,10 +2558,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_uint16x4_t = vld1_dup_u16 (0); } @@ -2566,10 +2569,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c 2011-09-16 20:16:00.357564842 -0700 @@ -15,5 +15,5 @@ out_uint32x2_t = vld1_dup_u32 (0); } @@ -2577,10 +2580,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c 2011-09-16 20:16:00.367564848 -0700 @@ -15,5 +15,5 @@ out_uint64x1_t = vld1_dup_u64 (0); } @@ -2588,10 +2591,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c 2011-09-16 20:16:00.367564848 -0700 @@ -15,5 +15,5 @@ out_uint8x8_t = vld1_dup_u8 (0); } @@ -2599,10 +2602,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); } @@ -2610,10 +2613,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); } @@ -2621,10 +2624,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); } @@ -2632,10 +2635,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); } @@ -2643,10 +2646,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); } @@ -2654,10 +2657,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); } @@ -2665,10 +2668,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); } @@ -2676,10 +2679,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); } @@ -2687,10 +2690,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); } @@ -2698,10 +2701,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); } @@ -2709,10 +2712,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c 2011-09-16 20:16:00.367564848 -0700 @@ -16,5 +16,5 @@ out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); } @@ -2720,10 +2723,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1f32.c 2011-09-16 20:16:00.367564848 -0700 @@ -15,5 +15,5 @@ out_float32x2_t = vld1_f32 (0); } @@ -2731,10 +2734,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1p16.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_poly16x4_t = vld1_p16 (0); } @@ -2742,10 +2745,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1p8.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_poly8x8_t = vld1_p8 (0); } @@ -2753,10 +2756,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s16.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_int16x4_t = vld1_s16 (0); } @@ -2764,10 +2767,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s32.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_int32x2_t = vld1_s32 (0); } @@ -2775,10 +2778,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s64.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_int64x1_t = vld1_s64 (0); } @@ -2786,10 +2789,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1s8.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_int8x8_t = vld1_s8 (0); } @@ -2797,10 +2800,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u16.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_uint16x4_t = vld1_u16 (0); } @@ -2808,10 +2811,10 @@ -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u32.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_uint32x2_t = vld1_u32 (0); } @@ -2819,10 +2822,10 @@ -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u64.c 2011-09-16 20:16:00.377564842 -0700 @@ -15,5 +15,5 @@ out_uint64x1_t = vld1_u64 (0); } @@ -2830,10 +2833,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld1u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld1u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld1u8.c 2011-09-16 20:16:00.387564830 -0700 @@ -15,5 +15,5 @@ out_uint8x8_t = vld1_u8 (0); } @@ -2841,10 +2844,10 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c 2011-09-16 20:16:00.387564830 -0700 @@ -16,5 +16,5 @@ out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1); } @@ -2852,10 +2855,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c 2011-09-16 20:16:00.387564830 -0700 @@ -16,5 +16,5 @@ out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1); } @@ -2863,10 +2866,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c 2011-09-16 20:16:00.387564830 -0700 @@ -16,5 +16,5 @@ out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1); } @@ -2874,10 +2877,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c 2011-09-16 20:16:00.387564830 -0700 @@ -16,5 +16,5 @@ out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1); } @@ -2885,10 +2888,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c 2011-09-16 20:16:00.397564843 -0700 @@ -16,5 +16,5 @@ out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1); } @@ -2896,10 +2899,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c 2011-09-16 20:16:00.397564843 -0700 @@ -16,5 +16,5 @@ out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1); } @@ -2907,10 +2910,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_float32x4x2_t = vld2q_f32 (0); } @@ -2920,10 +2923,10 @@ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_poly16x8x2_t = vld2q_p16 (0); } @@ -2933,10 +2936,10 @@ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_poly8x16x2_t = vld2q_p8 (0); } @@ -2946,10 +2949,10 @@ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_int16x8x2_t = vld2q_s16 (0); } @@ -2959,10 +2962,10 @@ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_int32x4x2_t = vld2q_s32 (0); } @@ -2972,10 +2975,10 @@ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_int8x16x2_t = vld2q_s8 (0); } @@ -2985,10 +2988,10 @@ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c 2011-09-16 20:16:00.397564843 -0700 @@ -15,6 +15,6 @@ out_uint16x8x2_t = vld2q_u16 (0); } @@ -2998,10 +3001,10 @@ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,6 +15,6 @@ out_uint32x4x2_t = vld2q_u32 (0); } @@ -3011,10 +3014,10 @@ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,6 +15,6 @@ out_uint8x16x2_t = vld2q_u8 (0); } @@ -3024,10 +3027,10 @@ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,5 +15,5 @@ out_float32x2x2_t = vld2_dup_f32 (0); } @@ -3035,10 +3038,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,5 +15,5 @@ out_poly16x4x2_t = vld2_dup_p16 (0); } @@ -3046,10 +3049,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,5 +15,5 @@ out_poly8x8x2_t = vld2_dup_p8 (0); } @@ -3057,10 +3060,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,5 +15,5 @@ out_int16x4x2_t = vld2_dup_s16 (0); } @@ -3068,10 +3071,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,5 +15,5 @@ out_int32x2x2_t = vld2_dup_s32 (0); } @@ -3079,10 +3082,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c 2011-09-16 20:16:00.407564879 -0700 @@ -15,5 +15,5 @@ out_int64x1x2_t = vld2_dup_s64 (0); } @@ -3090,10 +3093,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c 2011-09-16 20:16:00.417564906 -0700 @@ -15,5 +15,5 @@ out_int8x8x2_t = vld2_dup_s8 (0); } @@ -3101,10 +3104,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c 2011-09-16 20:16:00.417564906 -0700 @@ -15,5 +15,5 @@ out_uint16x4x2_t = vld2_dup_u16 (0); } @@ -3112,10 +3115,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c 2011-09-16 20:16:00.417564906 -0700 @@ -15,5 +15,5 @@ out_uint32x2x2_t = vld2_dup_u32 (0); } @@ -3123,10 +3126,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c 2011-09-16 20:16:00.417564906 -0700 @@ -15,5 +15,5 @@ out_uint64x1x2_t = vld2_dup_u64 (0); } @@ -3134,10 +3137,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c 2011-09-16 20:16:00.417564906 -0700 @@ -15,5 +15,5 @@ out_uint8x8x2_t = vld2_dup_u8 (0); } @@ -3145,10 +3148,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1); } @@ -3156,10 +3159,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1); } @@ -3167,10 +3170,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1); } @@ -3178,10 +3181,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1); } @@ -3189,10 +3192,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1); } @@ -3200,10 +3203,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1); } @@ -3211,10 +3214,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1); } @@ -3222,10 +3225,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1); } @@ -3233,10 +3236,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c 2011-09-16 20:16:00.417564906 -0700 @@ -16,5 +16,5 @@ out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1); } @@ -3244,10 +3247,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2f32.c 2011-09-16 20:16:00.427564921 -0700 @@ -15,5 +15,5 @@ out_float32x2x2_t = vld2_f32 (0); } @@ -3255,10 +3258,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2p16.c 2011-09-16 20:16:00.427564921 -0700 @@ -15,5 +15,5 @@ out_poly16x4x2_t = vld2_p16 (0); } @@ -3266,10 +3269,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2p8.c 2011-09-16 20:16:00.427564921 -0700 @@ -15,5 +15,5 @@ out_poly8x8x2_t = vld2_p8 (0); } @@ -3277,10 +3280,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s16.c 2011-09-16 20:16:00.427564921 -0700 @@ -15,5 +15,5 @@ out_int16x4x2_t = vld2_s16 (0); } @@ -3288,10 +3291,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s32.c 2011-09-16 20:16:00.427564921 -0700 @@ -15,5 +15,5 @@ out_int32x2x2_t = vld2_s32 (0); } @@ -3299,10 +3302,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s64.c 2011-09-16 20:16:00.427564921 -0700 @@ -15,5 +15,5 @@ out_int64x1x2_t = vld2_s64 (0); } @@ -3310,10 +3313,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2s8.c 2011-09-16 20:16:00.437564924 -0700 @@ -15,5 +15,5 @@ out_int8x8x2_t = vld2_s8 (0); } @@ -3321,10 +3324,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u16.c 2011-09-16 20:16:00.437564924 -0700 @@ -15,5 +15,5 @@ out_uint16x4x2_t = vld2_u16 (0); } @@ -3332,10 +3335,10 @@ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u32.c 2011-09-16 20:16:00.437564924 -0700 @@ -15,5 +15,5 @@ out_uint32x2x2_t = vld2_u32 (0); } @@ -3343,10 +3346,10 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u64.c 2011-09-16 20:16:00.437564924 -0700 @@ -15,5 +15,5 @@ out_uint64x1x2_t = vld2_u64 (0); } @@ -3354,10 +3357,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld2u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld2u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld2u8.c 2011-09-16 20:16:00.437564924 -0700 @@ -15,5 +15,5 @@ out_uint8x8x2_t = vld2_u8 (0); } @@ -3365,10 +3368,10 @@ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c 2011-09-16 20:16:00.437564924 -0700 @@ -16,5 +16,5 @@ out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1); } @@ -3376,10 +3379,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c 2011-09-16 20:16:00.437564924 -0700 @@ -16,5 +16,5 @@ out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1); } @@ -3387,10 +3390,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c 2011-09-16 20:16:00.447564932 -0700 @@ -16,5 +16,5 @@ out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1); } @@ -3398,10 +3401,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c 2011-09-16 20:16:00.447564932 -0700 @@ -16,5 +16,5 @@ out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1); } @@ -3409,10 +3412,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c 2011-09-16 20:16:00.447564932 -0700 @@ -16,5 +16,5 @@ out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1); } @@ -3420,10 +3423,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c 2011-09-16 20:16:00.447564932 -0700 @@ -16,5 +16,5 @@ out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1); } @@ -3431,10 +3434,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_float32x4x3_t = vld3q_f32 (0); } @@ -3444,10 +3447,10 @@ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_poly16x8x3_t = vld3q_p16 (0); } @@ -3457,10 +3460,10 @@ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_poly8x16x3_t = vld3q_p8 (0); } @@ -3470,10 +3473,10 @@ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_int16x8x3_t = vld3q_s16 (0); } @@ -3483,10 +3486,10 @@ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_int32x4x3_t = vld3q_s32 (0); } @@ -3496,10 +3499,10 @@ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_int8x16x3_t = vld3q_s8 (0); } @@ -3509,10 +3512,10 @@ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_uint16x8x3_t = vld3q_u16 (0); } @@ -3522,10 +3525,10 @@ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c 2011-09-16 20:16:00.447564932 -0700 @@ -15,6 +15,6 @@ out_uint32x4x3_t = vld3q_u32 (0); } @@ -3535,10 +3538,10 @@ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,6 +15,6 @@ out_uint8x16x3_t = vld3q_u8 (0); } @@ -3548,10 +3551,10 @@ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_float32x2x3_t = vld3_dup_f32 (0); } @@ -3559,10 +3562,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_poly16x4x3_t = vld3_dup_p16 (0); } @@ -3570,10 +3573,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_poly8x8x3_t = vld3_dup_p8 (0); } @@ -3581,10 +3584,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int16x4x3_t = vld3_dup_s16 (0); } @@ -3592,10 +3595,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int32x2x3_t = vld3_dup_s32 (0); } @@ -3603,10 +3606,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int64x1x3_t = vld3_dup_s64 (0); } @@ -3614,10 +3617,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int8x8x3_t = vld3_dup_s8 (0); } @@ -3625,10 +3628,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_uint16x4x3_t = vld3_dup_u16 (0); } @@ -3636,10 +3639,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_uint32x2x3_t = vld3_dup_u32 (0); } @@ -3647,10 +3650,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_uint64x1x3_t = vld3_dup_u64 (0); } @@ -3658,10 +3661,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_uint8x8x3_t = vld3_dup_u8 (0); } @@ -3669,10 +3672,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1); } @@ -3680,10 +3683,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1); } @@ -3691,10 +3694,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1); } @@ -3702,10 +3705,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1); } @@ -3713,10 +3716,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1); } @@ -3724,10 +3727,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1); } @@ -3735,10 +3738,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1); } @@ -3746,10 +3749,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1); } @@ -3757,10 +3760,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c 2011-09-16 20:16:00.457564944 -0700 @@ -16,5 +16,5 @@ out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1); } @@ -3768,10 +3771,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3f32.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_float32x2x3_t = vld3_f32 (0); } @@ -3779,10 +3782,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3p16.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_poly16x4x3_t = vld3_p16 (0); } @@ -3790,10 +3793,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3p8.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_poly8x8x3_t = vld3_p8 (0); } @@ -3801,10 +3804,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s16.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int16x4x3_t = vld3_s16 (0); } @@ -3812,10 +3815,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s32.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int32x2x3_t = vld3_s32 (0); } @@ -3823,10 +3826,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s64.c 2011-09-16 20:16:00.457564944 -0700 @@ -15,5 +15,5 @@ out_int64x1x3_t = vld3_s64 (0); } @@ -3834,10 +3837,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3s8.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,5 +15,5 @@ out_int8x8x3_t = vld3_s8 (0); } @@ -3845,10 +3848,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u16.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,5 +15,5 @@ out_uint16x4x3_t = vld3_u16 (0); } @@ -3856,10 +3859,10 @@ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u32.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,5 +15,5 @@ out_uint32x2x3_t = vld3_u32 (0); } @@ -3867,10 +3870,10 @@ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u64.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,5 +15,5 @@ out_uint64x1x3_t = vld3_u64 (0); } @@ -3878,10 +3881,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld3u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld3u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld3u8.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,5 +15,5 @@ out_uint8x8x3_t = vld3_u8 (0); } @@ -3889,10 +3892,10 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c 2011-09-16 20:16:00.467564964 -0700 @@ -16,5 +16,5 @@ out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1); } @@ -3900,10 +3903,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c 2011-09-16 20:16:00.467564964 -0700 @@ -16,5 +16,5 @@ out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1); } @@ -3911,10 +3914,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c 2011-09-16 20:16:00.467564964 -0700 @@ -16,5 +16,5 @@ out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1); } @@ -3922,10 +3925,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c 2011-09-16 20:16:00.467564964 -0700 @@ -16,5 +16,5 @@ out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1); } @@ -3933,10 +3936,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c 2011-09-16 20:16:00.467564964 -0700 @@ -16,5 +16,5 @@ out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1); } @@ -3944,10 +3947,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c 2011-09-16 20:16:00.467564964 -0700 @@ -16,5 +16,5 @@ out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1); } @@ -3955,10 +3958,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,6 +15,6 @@ out_float32x4x4_t = vld4q_f32 (0); } @@ -3968,10 +3971,10 @@ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,6 +15,6 @@ out_poly16x8x4_t = vld4q_p16 (0); } @@ -3981,10 +3984,10 @@ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c 2011-09-16 20:16:00.467564964 -0700 @@ -15,6 +15,6 @@ out_poly8x16x4_t = vld4q_p8 (0); } @@ -3994,10 +3997,10 @@ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,6 +15,6 @@ out_int16x8x4_t = vld4q_s16 (0); } @@ -4007,10 +4010,10 @@ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,6 +15,6 @@ out_int32x4x4_t = vld4q_s32 (0); } @@ -4020,10 +4023,10 @@ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,6 +15,6 @@ out_int8x16x4_t = vld4q_s8 (0); } @@ -4033,10 +4036,10 @@ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,6 +15,6 @@ out_uint16x8x4_t = vld4q_u16 (0); } @@ -4046,10 +4049,10 @@ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,6 +15,6 @@ out_uint32x4x4_t = vld4q_u32 (0); } @@ -4059,10 +4062,10 @@ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,6 +15,6 @@ out_uint8x16x4_t = vld4q_u8 (0); } @@ -4072,10 +4075,10 @@ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,5 +15,5 @@ out_float32x2x4_t = vld4_dup_f32 (0); } @@ -4083,10 +4086,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,5 +15,5 @@ out_poly16x4x4_t = vld4_dup_p16 (0); } @@ -4094,10 +4097,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,5 +15,5 @@ out_poly8x8x4_t = vld4_dup_p8 (0); } @@ -4105,10 +4108,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,5 +15,5 @@ out_int16x4x4_t = vld4_dup_s16 (0); } @@ -4116,10 +4119,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c 2011-09-16 20:16:00.477564991 -0700 @@ -15,5 +15,5 @@ out_int32x2x4_t = vld4_dup_s32 (0); } @@ -4127,10 +4130,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c 2011-09-16 20:16:00.487565006 -0700 @@ -15,5 +15,5 @@ out_int64x1x4_t = vld4_dup_s64 (0); } @@ -4138,10 +4141,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c 2011-09-16 20:16:00.487565006 -0700 @@ -15,5 +15,5 @@ out_int8x8x4_t = vld4_dup_s8 (0); } @@ -4149,10 +4152,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c 2011-09-16 20:16:00.487565006 -0700 @@ -15,5 +15,5 @@ out_uint16x4x4_t = vld4_dup_u16 (0); } @@ -4160,10 +4163,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c 2011-09-16 20:16:00.487565006 -0700 @@ -15,5 +15,5 @@ out_uint32x2x4_t = vld4_dup_u32 (0); } @@ -4171,10 +4174,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c 2011-09-16 20:16:00.487565006 -0700 @@ -15,5 +15,5 @@ out_uint64x1x4_t = vld4_dup_u64 (0); } @@ -4182,10 +4185,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c 2011-09-16 20:16:00.487565006 -0700 @@ -15,5 +15,5 @@ out_uint8x8x4_t = vld4_dup_u8 (0); } @@ -4193,10 +4196,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c 2011-09-16 20:16:00.487565006 -0700 @@ -16,5 +16,5 @@ out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1); } @@ -4204,10 +4207,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c 2011-09-16 20:16:00.487565006 -0700 @@ -16,5 +16,5 @@ out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1); } @@ -4215,10 +4218,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c 2011-09-16 20:16:00.487565006 -0700 @@ -16,5 +16,5 @@ out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1); } @@ -4226,10 +4229,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c 2011-09-16 20:16:00.497565009 -0700 @@ -16,5 +16,5 @@ out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1); } @@ -4237,10 +4240,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c 2011-09-16 20:16:00.497565009 -0700 @@ -16,5 +16,5 @@ out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1); } @@ -4248,10 +4251,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c 2011-09-16 20:16:00.497565009 -0700 @@ -16,5 +16,5 @@ out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1); } @@ -4259,10 +4262,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c 2011-09-16 20:16:00.497565009 -0700 @@ -16,5 +16,5 @@ out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1); } @@ -4270,10 +4273,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c 2011-09-16 20:16:00.497565009 -0700 @@ -16,5 +16,5 @@ out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1); } @@ -4281,10 +4284,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c 2011-09-16 20:16:00.497565009 -0700 @@ -16,5 +16,5 @@ out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1); } @@ -4292,10 +4295,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4f32.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_float32x2x4_t = vld4_f32 (0); } @@ -4303,10 +4306,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4p16.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_poly16x4x4_t = vld4_p16 (0); } @@ -4314,10 +4317,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4p8.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_poly8x8x4_t = vld4_p8 (0); } @@ -4325,10 +4328,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s16.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_int16x4x4_t = vld4_s16 (0); } @@ -4336,10 +4339,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s32.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_int32x2x4_t = vld4_s32 (0); } @@ -4347,10 +4350,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s64.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_int64x1x4_t = vld4_s64 (0); } @@ -4358,10 +4361,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4s8.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_int8x8x4_t = vld4_s8 (0); } @@ -4369,10 +4372,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u16.c 2011-09-16 20:16:00.497565009 -0700 @@ -15,5 +15,5 @@ out_uint16x4x4_t = vld4_u16 (0); } @@ -4380,10 +4383,10 @@ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u32.c 2011-09-16 20:16:00.507565013 -0700 @@ -15,5 +15,5 @@ out_uint32x2x4_t = vld4_u32 (0); } @@ -4391,10 +4394,10 @@ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u64.c 2011-09-16 20:16:00.507565013 -0700 @@ -15,5 +15,5 @@ out_uint64x1x4_t = vld4_u64 (0); } @@ -4402,10 +4405,10 @@ -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vld4u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vld4u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vld4u8.c 2011-09-16 20:16:00.507565013 -0700 @@ -15,5 +15,5 @@ out_uint8x8x4_t = vld4_u8 (0); } @@ -4413,10 +4416,10 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1); } @@ -4424,10 +4427,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1); } @@ -4435,10 +4438,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1); } @@ -4446,10 +4449,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1); } @@ -4457,10 +4460,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1); } @@ -4468,10 +4471,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1); } @@ -4479,10 +4482,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1); } @@ -4490,10 +4493,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1); } @@ -4501,10 +4504,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1); } @@ -4512,10 +4515,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1); } @@ -4523,10 +4526,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1); } @@ -4534,10 +4537,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_f32 (arg0_float32_t, arg1_float32x4_t); } @@ -4545,10 +4548,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t); } @@ -4556,10 +4559,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t); } @@ -4567,10 +4570,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c 2011-09-16 20:16:00.507565013 -0700 @@ -16,5 +16,5 @@ vst1q_s16 (arg0_int16_t, arg1_int16x8_t); } @@ -4578,10 +4581,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_s32 (arg0_int32_t, arg1_int32x4_t); } @@ -4589,10 +4592,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_s64 (arg0_int64_t, arg1_int64x2_t); } @@ -4600,10 +4603,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_s8 (arg0_int8_t, arg1_int8x16_t); } @@ -4611,10 +4614,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t); } @@ -4622,10 +4625,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t); } @@ -4633,10 +4636,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t); } @@ -4644,10 +4647,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t); } @@ -4655,10 +4658,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); } @@ -4666,10 +4669,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); } @@ -4677,10 +4680,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); } @@ -4688,10 +4691,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); } @@ -4699,10 +4702,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); } @@ -4710,10 +4713,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); } @@ -4721,10 +4724,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); } @@ -4732,10 +4735,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); } @@ -4743,10 +4746,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); } @@ -4754,10 +4757,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); } @@ -4765,10 +4768,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); } @@ -4776,10 +4779,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1f32.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_f32 (arg0_float32_t, arg1_float32x2_t); } @@ -4787,10 +4790,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1p16.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_p16 (arg0_poly16_t, arg1_poly16x4_t); } @@ -4798,10 +4801,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1p8.c 2011-09-16 20:16:00.517565031 -0700 @@ -16,5 +16,5 @@ vst1_p8 (arg0_poly8_t, arg1_poly8x8_t); } @@ -4809,10 +4812,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_s16 (arg0_int16_t, arg1_int16x4_t); } @@ -4820,10 +4823,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_s32 (arg0_int32_t, arg1_int32x2_t); } @@ -4831,10 +4834,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s64.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_s64 (arg0_int64_t, arg1_int64x1_t); } @@ -4842,10 +4845,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1s8.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_s8 (arg0_int8_t, arg1_int8x8_t); } @@ -4853,10 +4856,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_u16 (arg0_uint16_t, arg1_uint16x4_t); } @@ -4864,10 +4867,10 @@ -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_u32 (arg0_uint32_t, arg1_uint32x2_t); } @@ -4875,10 +4878,10 @@ -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u64.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_u64 (arg0_uint64_t, arg1_uint64x1_t); } @@ -4886,10 +4889,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst1u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst1u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst1u8.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst1_u8 (arg0_uint8_t, arg1_uint8x8_t); } @@ -4897,10 +4900,10 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1); } @@ -4908,10 +4911,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1); } @@ -4919,10 +4922,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1); } @@ -4930,10 +4933,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1); } @@ -4941,10 +4944,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1); } @@ -4952,10 +4955,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,5 +16,5 @@ vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1); } @@ -4963,10 +4966,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t); } @@ -4976,10 +4979,10 @@ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t); } @@ -4989,10 +4992,10 @@ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t); } @@ -5002,10 +5005,10 @@ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t); } @@ -5015,10 +5018,10 @@ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t); } @@ -5028,10 +5031,10 @@ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t); } @@ -5041,10 +5044,10 @@ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t); } @@ -5054,10 +5057,10 @@ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c 2011-09-16 20:16:00.527565060 -0700 @@ -16,6 +16,6 @@ vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t); } @@ -5067,10 +5070,10 @@ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,6 +16,6 @@ vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t); } @@ -5080,10 +5083,10 @@ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1); } @@ -5091,10 +5094,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1); } @@ -5102,10 +5105,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1); } @@ -5113,10 +5116,10 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1); } @@ -5124,10 +5127,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1); } @@ -5135,10 +5138,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1); } @@ -5146,10 +5149,10 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1); } @@ -5157,10 +5160,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1); } @@ -5168,10 +5171,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1); } @@ -5179,10 +5182,10 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2f32.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_f32 (arg0_float32_t, arg1_float32x2x2_t); } @@ -5190,10 +5193,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2p16.c 2011-09-16 20:16:00.537565077 -0700 @@ -16,5 +16,5 @@ vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t); } @@ -5201,10 +5204,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2p8.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t); } @@ -5212,10 +5215,10 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s16.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_s16 (arg0_int16_t, arg1_int16x4x2_t); } @@ -5223,10 +5226,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s32.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_s32 (arg0_int32_t, arg1_int32x2x2_t); } @@ -5234,10 +5237,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s64.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_s64 (arg0_int64_t, arg1_int64x1x2_t); } @@ -5245,10 +5248,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2s8.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_s8 (arg0_int8_t, arg1_int8x8x2_t); } @@ -5256,10 +5259,10 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u16.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t); } @@ -5267,10 +5270,10 @@ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u32.c 2011-09-16 20:16:00.547565082 -0700 @@ -16,5 +16,5 @@ vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t); } @@ -5278,10 +5281,10 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u64.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t); } @@ -5289,10 +5292,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst2u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst2u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst2u8.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t); } @@ -5300,10 +5303,10 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1); } @@ -5311,10 +5314,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1); } @@ -5322,10 +5325,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1); } @@ -5333,10 +5336,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1); } @@ -5344,10 +5347,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1); } @@ -5355,10 +5358,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,5 +16,5 @@ vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1); } @@ -5366,10 +5369,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c 2011-09-16 20:16:00.557565092 -0700 @@ -16,6 +16,6 @@ vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t); } @@ -5379,10 +5382,10 @@ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t); } @@ -5392,10 +5395,10 @@ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t); } @@ -5405,10 +5408,10 @@ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t); } @@ -5418,10 +5421,10 @@ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t); } @@ -5431,10 +5434,10 @@ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t); } @@ -5444,10 +5447,10 @@ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t); } @@ -5457,10 +5460,10 @@ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t); } @@ -5470,10 +5473,10 @@ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,6 +16,6 @@ vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t); } @@ -5483,10 +5486,10 @@ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c 2011-09-16 20:16:00.567565108 -0700 @@ -16,5 +16,5 @@ vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1); } @@ -5494,10 +5497,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1); } @@ -5505,10 +5508,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1); } @@ -5516,10 +5519,10 @@ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1); } @@ -5527,10 +5530,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1); } @@ -5538,10 +5541,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1); } @@ -5549,10 +5552,10 @@ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1); } @@ -5560,10 +5563,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c 2011-09-16 20:16:00.577565135 -0700 @@ -16,5 +16,5 @@ vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1); } @@ -5571,10 +5574,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1); } @@ -5582,10 +5585,10 @@ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3f32.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_f32 (arg0_float32_t, arg1_float32x2x3_t); } @@ -5593,10 +5596,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3p16.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t); } @@ -5604,10 +5607,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3p8.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t); } @@ -5615,10 +5618,10 @@ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s16.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_s16 (arg0_int16_t, arg1_int16x4x3_t); } @@ -5626,10 +5629,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s32.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_s32 (arg0_int32_t, arg1_int32x2x3_t); } @@ -5637,10 +5640,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s64.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_s64 (arg0_int64_t, arg1_int64x1x3_t); } @@ -5648,10 +5651,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3s8.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_s8 (arg0_int8_t, arg1_int8x8x3_t); } @@ -5659,10 +5662,10 @@ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u16.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t); } @@ -5670,10 +5673,10 @@ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u32.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t); } @@ -5681,10 +5684,10 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u64.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t); } @@ -5692,10 +5695,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst3u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst3u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst3u8.c 2011-09-16 20:16:00.587565144 -0700 @@ -16,5 +16,5 @@ vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t); } @@ -5703,10 +5706,10 @@ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,5 +16,5 @@ vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1); } @@ -5714,10 +5717,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,5 +16,5 @@ vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1); } @@ -5725,10 +5728,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,5 +16,5 @@ vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1); } @@ -5736,10 +5739,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,5 +16,5 @@ vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1); } @@ -5747,10 +5750,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,5 +16,5 @@ vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1); } @@ -5758,10 +5761,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,5 +16,5 @@ vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1); } @@ -5769,10 +5772,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,6 +16,6 @@ vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t); } @@ -5782,10 +5785,10 @@ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,6 +16,6 @@ vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t); } @@ -5795,10 +5798,10 @@ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,6 +16,6 @@ vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t); } @@ -5808,10 +5811,10 @@ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,6 +16,6 @@ vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t); } @@ -5821,10 +5824,10 @@ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c 2011-09-16 20:16:00.597565156 -0700 @@ -16,6 +16,6 @@ vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t); } @@ -5834,10 +5837,10 @@ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,6 +16,6 @@ vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t); } @@ -5847,10 +5850,10 @@ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,6 +16,6 @@ vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t); } @@ -5860,10 +5863,10 @@ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,6 +16,6 @@ vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t); } @@ -5873,10 +5876,10 @@ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,6 +16,6 @@ vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t); } @@ -5886,10 +5889,10 @@ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1); } @@ -5897,10 +5900,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1); } @@ -5908,10 +5911,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1); } @@ -5919,10 +5922,10 @@ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1); } @@ -5930,10 +5933,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1); } @@ -5941,10 +5944,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1); } @@ -5952,10 +5955,10 @@ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1); } @@ -5963,10 +5966,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1); } @@ -5974,10 +5977,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1); } @@ -5985,10 +5988,10 @@ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4f32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4f32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4f32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4f32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4f32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4f32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_f32 (arg0_float32_t, arg1_float32x2x4_t); } @@ -5996,10 +5999,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4p16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4p16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4p16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4p16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4p16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4p16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t); } @@ -6007,10 +6010,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4p8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4p8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4p8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4p8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4p8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4p8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t); } @@ -6018,10 +6021,10 @@ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4s16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_s16 (arg0_int16_t, arg1_int16x4x4_t); } @@ -6029,10 +6032,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4s32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_s32 (arg0_int32_t, arg1_int32x2x4_t); } @@ -6040,10 +6043,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4s64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s64.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_s64 (arg0_int64_t, arg1_int64x1x4_t); } @@ -6051,10 +6054,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4s8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4s8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4s8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_s8 (arg0_int8_t, arg1_int8x8x4_t); } @@ -6062,10 +6065,10 @@ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u16.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4u16.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u16.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u16.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u16.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u16.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t); } @@ -6073,10 +6076,10 @@ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u32.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4u32.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u32.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u32.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u32.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u32.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t); } @@ -6084,10 +6087,10 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u64.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4u64.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u64.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u64.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u64.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u64.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t); } @@ -6095,10 +6098,10 @@ -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u8.c' ---- old/gcc/testsuite/gcc.target/arm/neon/vst4u8.c 2010-05-24 18:36:31 +0000 -+++ new/gcc/testsuite/gcc.target/arm/neon/vst4u8.c 2011-05-03 15:14:56 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u8.c +=================================================================== +--- gcc-4_6-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u8.c 2011-06-24 08:13:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/neon/vst4u8.c 2011-09-16 20:16:00.607565171 -0700 @@ -16,5 +16,5 @@ vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t); } @@ -6106,10 +6109,10 @@ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ - -=== added file 'gcc/testsuite/gcc.target/arm/pr46329.c' ---- old/gcc/testsuite/gcc.target/arm/pr46329.c 1970-01-01 00:00:00 +0000 -+++ new/gcc/testsuite/gcc.target/arm/pr46329.c 2011-05-03 15:18:07 +0000 +Index: gcc-4_6-branch/gcc/testsuite/gcc.target/arm/pr46329.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc-4_6-branch/gcc/testsuite/gcc.target/arm/pr46329.c 2011-09-16 20:16:00.617565191 -0700 @@ -0,0 +1,9 @@ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_neon } */ @@ -6120,4 +6123,3 @@ +{ + x <<= x; +} - |