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| author |   Khem Raj <raj.khem@gmail.com> | 2021-02-03 13:41:18 -0800 |
|---|---|---|
| committer |   Richard Purdie <richard.purdie@linuxfoundation.org> | 2021-02-05 12:00:50 +0000 |
| commit | c864e0e496ab1a4176d7a1673d8fc5b300ae68cf (patch) | |
| tree | 02bfd9ad00cebcba88545032dcc554cf6ea02190 /meta/recipes-core/glibc | |
| parent | aa87638cf4f2bef66df92f961c7814f6b482fd3d (diff) | |
| download | openembedded-core-contrib-c864e0e496ab1a4176d7a1673d8fc5b300ae68cf.tar.gz | |
glibc: Enable cet
Enable Intel Control-flow Enforcement Technology (CET) instrumentation
support
helps with overcoming
/lib/libc.so.6: CPU ISA level is lower than required
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-core/glibc')
| -rw-r--r-- | meta/recipes-core/glibc/glibc_2.33.bb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/meta/recipes-core/glibc/glibc_2.33.bb b/meta/recipes-core/glibc/glibc_2.33.bb index 2259d60196..b39f97d656 100644 --- a/meta/recipes-core/glibc/glibc_2.33.bb +++ b/meta/recipes-core/glibc/glibc_2.33.bb @@ -74,6 +74,9 @@ EXTRA_OECONF = "--enable-kernel=${OLDEST_KERNEL} \ EXTRA_OECONF += "${@get_libc_fpu_setting(bb, d)}" +EXTRA_OECONF_append_x86 = " --enable-cet" +EXTRA_OECONF_append_x86-64 = " --enable-cet" + PACKAGECONFIG ??= "nscd" PACKAGECONFIG[nscd] = "--enable-nscd,--disable-nscd" |