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authorKhem Raj <raj.khem@gmail.com>2015-08-16 11:30:03 -0700
committerRichard Purdie <richard.purdie@linuxfoundation.org>2015-08-19 17:57:50 +0100
commit73bcb12743537e8b0e047b0783dc8f5bb2f62db6 (patch)
treed2f554753aee3d50af0c337cbc5c8c83cb002598 /meta/recipes-support/lzop
parent39a9d16a94954d6ba8c90c705801f21ae81fbaf7 (diff)
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lzop: Fix build with gcc5 on ppc
It seems all other architectures provide their own definitions for these functions like __ACC_UA_GET_LE16 and this code is exposed only on ppc this is the typical extern inline ( gnu definition ) version c99 semantics, lets use static inline which works both ways Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
Diffstat (limited to 'meta/recipes-support/lzop')
-rw-r--r--meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch100
-rw-r--r--meta/recipes-support/lzop/lzop_1.03.bb4
2 files changed, 103 insertions, 1 deletions
diff --git a/meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch b/meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch
new file mode 100644
index 0000000000..867b88b308
--- /dev/null
+++ b/meta/recipes-support/lzop/lzop/0001-use-static-inlines-as-the-external-inline-definition.patch
@@ -0,0 +1,100 @@
+From ecccbcf66da53779d88e38e2af7f82eff8dde7f8 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sun, 16 Aug 2015 10:35:47 -0700
+Subject: [PATCH] use static inlines as the external inline definition has
+ changed with gcc5
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+Upstream-Status: Pending
+
+ src/miniacc.h | 24 ++++++++----------------
+ 1 file changed, 8 insertions(+), 16 deletions(-)
+
+diff --git a/src/miniacc.h b/src/miniacc.h
+index 09e6f0c..cae98d1 100644
+--- a/src/miniacc.h
++++ b/src/miniacc.h
+@@ -2880,8 +2880,7 @@ typedef void (__acc_cdecl_sighandler *acc_sighandler_t)(acc_signo_t);
+ #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
+ #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
+ #if !defined(ACC_UA_GET_LE16)
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp);
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
++static __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
+ __acc_ua_volatile const acc_uint16e_t* p = (__acc_ua_volatile const acc_uint16e_t*) pp;
+ unsigned long v;
+ __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
+@@ -2890,8 +2889,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const
+ #define ACC_UA_GET_LE16(p) __ACC_UA_GET_LE16(p)
+ #endif
+ #if !defined(ACC_UA_SET_LE16)
+-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v);
+-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
++static __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
+ __acc_ua_volatile acc_uint16e_t* p = (__acc_ua_volatile acc_uint16e_t*) pp;
+ __asm__ __volatile__("sthbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
+ }
+@@ -2916,8 +2914,7 @@ extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsi
+ #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
+ #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
+ #if !defined(ACC_UA_GET_LE32)
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp);
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
++static __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
+ __acc_ua_volatile const acc_uint32e_t* p = (__acc_ua_volatile const acc_uint32e_t*) pp;
+ unsigned long v;
+ __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
+@@ -2926,8 +2923,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const
+ #define ACC_UA_GET_LE32(p) __ACC_UA_GET_LE32(p)
+ #endif
+ #if !defined(ACC_UA_SET_LE32)
+-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v);
+-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
++static __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
+ __acc_ua_volatile acc_uint32e_t* p = (__acc_ua_volatile acc_uint32e_t*) pp;
+ __asm__ __volatile__("stwbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
+ }
+@@ -3307,8 +3303,7 @@ typedef void (__acc_cdecl_sighandler *acc_sighandler_t)(acc_signo_t);
+ #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
+ #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
+ #if !defined(ACC_UA_GET_LE16)
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp);
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
++static __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const void* pp) {
+ __acc_ua_volatile const acc_uint16e_t* p = (__acc_ua_volatile const acc_uint16e_t*) pp;
+ unsigned long v;
+ __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
+@@ -3317,8 +3312,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE16(__acc_ua_volatile const
+ #define ACC_UA_GET_LE16(p) __ACC_UA_GET_LE16(p)
+ #endif
+ #if !defined(ACC_UA_SET_LE16)
+-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v);
+-extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
++static __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsigned long v) {
+ __acc_ua_volatile acc_uint16e_t* p = (__acc_ua_volatile acc_uint16e_t*) pp;
+ __asm__ __volatile__("sthbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
+ }
+@@ -3343,8 +3337,7 @@ extern __acc_forceinline void __ACC_UA_SET_LE16(__acc_ua_volatile void* pp, unsi
+ #if !(ACC_CFG_NO_INLINE_ASM) && (__acc_HAVE_forceinline)
+ #if (ACC_ARCH_POWERPC && ACC_ABI_BIG_ENDIAN) && (ACC_CC_GNUC)
+ #if !defined(ACC_UA_GET_LE32)
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp);
+-extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
++static __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const void* pp) {
+ __acc_ua_volatile const acc_uint32e_t* p = (__acc_ua_volatile const acc_uint32e_t*) pp;
+ unsigned long v;
+ __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (v) : "r" (p), "m" (*p));
+@@ -3353,8 +3346,7 @@ extern __acc_forceinline unsigned long __ACC_UA_GET_LE32(__acc_ua_volatile const
+ #define ACC_UA_GET_LE32(p) __ACC_UA_GET_LE32(p)
+ #endif
+ #if !defined(ACC_UA_SET_LE32)
+-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v);
+-extern __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
++static __acc_forceinline void __ACC_UA_SET_LE32(__acc_ua_volatile void* pp, unsigned long v) {
+ __acc_ua_volatile acc_uint32e_t* p = (__acc_ua_volatile acc_uint32e_t*) pp;
+ __asm__ __volatile__("stwbrx %2,0,%1" : "=m" (*p) : "r" (p), "r" (v));
+ }
+--
+2.5.0
+
diff --git a/meta/recipes-support/lzop/lzop_1.03.bb b/meta/recipes-support/lzop/lzop_1.03.bb
index 1fcd81df6c..07d628908a 100644
--- a/meta/recipes-support/lzop/lzop_1.03.bb
+++ b/meta/recipes-support/lzop/lzop_1.03.bb
@@ -13,7 +13,9 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=dfeaf3dc4beef4f5a7bdbc35b197f39e \
SRC_URI = "http://www.lzop.org/download/${BP}.tar.gz \
file://acinclude.m4 \
- file://x32_abi_miniacc_h.patch "
+ file://x32_abi_miniacc_h.patch \
+ file://0001-use-static-inlines-as-the-external-inline-definition.patch \
+ "
SRC_URI[md5sum] = "006c5e27fb78cdd14a628fdfa5aa1905"
SRC_URI[sha256sum] = "c1425b8c77d49f5a679d5a126c90ea6ad99585a55e335a613cae59e909dbb2c9"