2010-09-13 Andrew Stubbs Backport from FSF: 2010-09-13 Marcus Shawcroft * config/arm/arm.md: (define_attr "conds"): Update comment. * config/arm/sync.md (arm_sync_compare_and_swapsi): Change conds attribute to clob. (arm_sync_compare_and_swapsi): Likewise. (arm_sync_compare_and_swap): Likewise. (arm_sync_lock_test_and_setsi): Likewise. (arm_sync_lock_test_and_set): Likewise. (arm_sync_new_si): Likewise. (arm_sync_new_nandsi): Likewise. (arm_sync_new_): Likewise. (arm_sync_new_nand): Likewise. (arm_sync_old_si): Likewise. (arm_sync_old_nandsi): Likewise. (arm_sync_old_): Likewise. (arm_sync_old_nand): Likewise. 2010-09-13 Marcus Shawcroft * gcc.target/arm/sync-1.c: New. 2010-09-10 Andrew Stubbs gcc/ === modified file 'gcc/config/arm/arm.md' --- old/gcc/config/arm/arm.md 2010-09-09 15:03:00 +0000 +++ new/gcc/config/arm/arm.md 2010-09-13 15:39:11 +0000 @@ -352,10 +352,11 @@ ; CLOB means that the condition codes are altered in an undefined manner, if ; they are altered at all ; -; UNCONDITIONAL means the instions can not be conditionally executed. +; UNCONDITIONAL means the instruction can not be conditionally executed and +; that the instruction does not use or alter the condition codes. ; -; NOCOND means that the condition codes are neither altered nor affect the -; output of this insn +; NOCOND means that the instruction does not use or alter the condition +; codes but can be converted into a conditionally exectuted instruction. (define_attr "conds" "use,set,clob,unconditional,nocond" (if_then_else (eq_attr "type" "call") === modified file 'gcc/config/arm/sync.md' --- old/gcc/config/arm/sync.md 2010-09-09 15:18:16 +0000 +++ new/gcc/config/arm/sync.md 2010-09-13 15:39:11 +0000 @@ -300,7 +300,7 @@ (set_attr "sync_new_value" "3") (set_attr "sync_t1" "0") (set_attr "sync_t2" "4") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_compare_and_swap" @@ -327,7 +327,7 @@ (set_attr "sync_new_value" "3") (set_attr "sync_t1" "0") (set_attr "sync_t2" "4") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_lock_test_and_setsi" @@ -348,7 +348,7 @@ (set_attr "sync_new_value" "2") (set_attr "sync_t1" "0") (set_attr "sync_t2" "3") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_lock_test_and_set" @@ -369,7 +369,7 @@ (set_attr "sync_new_value" "2") (set_attr "sync_t1" "0") (set_attr "sync_t2" "3") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_new_si" @@ -394,7 +394,7 @@ (set_attr "sync_t1" "0") (set_attr "sync_t2" "3") (set_attr "sync_op" "") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_new_nandsi" @@ -419,7 +419,7 @@ (set_attr "sync_t1" "0") (set_attr "sync_t2" "3") (set_attr "sync_op" "nand") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_new_" @@ -445,7 +445,7 @@ (set_attr "sync_t1" "0") (set_attr "sync_t2" "3") (set_attr "sync_op" "") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_new_nand" @@ -472,7 +472,7 @@ (set_attr "sync_t1" "0") (set_attr "sync_t2" "3") (set_attr "sync_op" "nand") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_old_si" @@ -498,7 +498,7 @@ (set_attr "sync_t1" "3") (set_attr "sync_t2" "4") (set_attr "sync_op" "") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_old_nandsi" @@ -524,7 +524,7 @@ (set_attr "sync_t1" "3") (set_attr "sync_t2" "4") (set_attr "sync_op" "nand") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_old_" @@ -551,7 +551,7 @@ (set_attr "sync_t1" "3") (set_attr "sync_t2" "4") (set_attr "sync_op" "") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "arm_sync_old_nand" @@ -578,7 +578,7 @@ (set_attr "sync_t1" "3") (set_attr "sync_t2" "4") (set_attr "sync_op" "nand") - (set_attr "conds" "nocond") + (set_attr "conds" "clob") (set_attr "predicable" "no")]) (define_insn "*memory_barrier" === added file 'gcc/testsuite/gcc.target/arm/sync-1.c' --- old/gcc/testsuite/gcc.target/arm/sync-1.c 1970-01-01 00:00:00 +0000 +++ new/gcc/testsuite/gcc.target/arm/sync-1.c 2010-09-13 15:39:11 +0000 @@ -0,0 +1,25 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -march=armv7-a" } */ + +volatile int mem; + +int +bar (int x, int y) +{ + if (x) + __sync_fetch_and_add(&mem, y); + return 0; +} + +extern void abort (void); + +int +main (int argc, char *argv[]) +{ + mem = 0; + bar (0, 1); + bar (1, 1); + if (mem != 1) + abort (); + return 0; +}