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--- llvm/lib/Target/ARM/ARMCodeEmitter.cpp 2010/05/25 10:23:52 104588
+++ llvm/lib/Target/ARM/ARMCodeEmitter.cpp 2010/05/26 00:02:28 104652
@@ -146,11 +146,11 @@
return getMachineOpValue(MI, MI.getOperand(OpIdx));
}
- /// getMovi32Value - Return binary encoding of operand for movw/movt. If the
+ /// getMovi32Value - Return binary encoding of operand for movw/movt. If the
/// machine operand requires relocation, record the relocation and return zero.
- unsigned getMovi32Value(const MachineInstr &MI,const MachineOperand &MO,
+ unsigned getMovi32Value(const MachineInstr &MI,const MachineOperand &MO,
unsigned Reloc);
- unsigned getMovi32Value(const MachineInstr &MI, unsigned OpIdx,
+ unsigned getMovi32Value(const MachineInstr &MI, unsigned OpIdx,
unsigned Reloc) {
return getMovi32Value(MI, MI.getOperand(OpIdx), Reloc);
}
@@ -227,12 +227,12 @@
return 0;
}
-/// getMovi32Value - Return binary encoding of operand for movw/movt. If the
+/// getMovi32Value - Return binary encoding of operand for movw/movt. If the
/// machine operand requires relocation, record the relocation and return zero.
unsigned ARMCodeEmitter::getMovi32Value(const MachineInstr &MI,
- const MachineOperand &MO,
+ const MachineOperand &MO,
unsigned Reloc) {
- assert(((Reloc == ARM::reloc_arm_movt) || (Reloc == ARM::reloc_arm_movw))
+ assert(((Reloc == ARM::reloc_arm_movt) || (Reloc == ARM::reloc_arm_movw))
&& "Relocation to this function should be for movt or movw");
if (MO.isImm())
@@ -1459,7 +1459,12 @@
break;
++NumRegs;
}
- Binary |= NumRegs * 2;
+ // Bit 8 will be set if <list> is consecutive 64-bit registers (e.g., D0)
+ // Otherwise, it will be 0, in the case of 32-bit registers.
+ if(Binary & 0x100)
+ Binary |= NumRegs * 2;
+ else
+ Binary |= NumRegs;
emitWordLE(Binary);
}
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