diff options
Diffstat (limited to 'meta/recipes-devtools/python/python3-numpy/0001-numpy-core-Define-RISCV-32-support.patch')
| -rw-r--r-- | meta/recipes-devtools/python/python3-numpy/0001-numpy-core-Define-RISCV-32-support.patch | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/meta/recipes-devtools/python/python3-numpy/0001-numpy-core-Define-RISCV-32-support.patch b/meta/recipes-devtools/python/python3-numpy/0001-numpy-core-Define-RISCV-32-support.patch new file mode 100644 index 0000000000..676bdbb3af --- /dev/null +++ b/meta/recipes-devtools/python/python3-numpy/0001-numpy-core-Define-RISCV-32-support.patch @@ -0,0 +1,50 @@ +From eb6d6579150bf4684603ce377c51e90ad3bb8109 Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Sun, 15 Nov 2020 15:32:39 -0800 +Subject: [PATCH] numpy/core: Define RISCV-32 support + +Helps compile on riscv32 + +Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/17780] +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + numpy/core/include/numpy/npy_cpu.h | 3 +++ + numpy/core/include/numpy/npy_endian.h | 1 + + 2 files changed, 4 insertions(+) + +diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h +index 78d229e..04be511 100644 +--- a/numpy/core/include/numpy/npy_cpu.h ++++ b/numpy/core/include/numpy/npy_cpu.h +@@ -19,6 +19,7 @@ + * NPY_CPU_ARCEB + * NPY_CPU_RISCV64 + * NPY_CPU_LOONGARCH ++ * NPY_CPU_RISCV32 + * NPY_CPU_WASM + */ + #ifndef NUMPY_CORE_INCLUDE_NUMPY_NPY_CPU_H_ +@@ -104,6 +105,8 @@ + #define NPY_CPU_ARCEB + #elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64 + #define NPY_CPU_RISCV64 ++#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 32 ++ #define NPY_CPU_RISCV32 + #elif defined(__loongarch__) + #define NPY_CPU_LOONGARCH + #elif defined(__EMSCRIPTEN__) +diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h +index 5e58a7f..0926212 100644 +--- a/numpy/core/include/numpy/npy_endian.h ++++ b/numpy/core/include/numpy/npy_endian.h +@@ -49,6 +49,7 @@ + || defined(NPY_CPU_PPC64LE) \ + || defined(NPY_CPU_ARCEL) \ + || defined(NPY_CPU_RISCV64) \ ++ || defined(NPY_CPU_RISCV32) \ + || defined(NPY_CPU_LOONGARCH) \ + || defined(NPY_CPU_WASM) + #define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN +-- +2.20.1 + |